Accelar™
2 Gbps 850 nm SFP Transceivers with Optional Triple-Rate,
Extended Temperature & Voltage, and Digital Diagnostics
PL-XPL-Vx-S2x-xx
This standard dual-rate Small Form Factor Pluggable
(SFP) transceiver provides superior performance for Fibre
Channel applications, and is another in Picolight’s family
of
Accelar
products customized for high speed, short
reach LAN, SAN, and intra-POP applications. The multi-
rate feature enables its use in a wider range of system
applications without the need to provide the rate select
input. It is fully compliant with both FC-PI
100-M5/M6-SN-I and 200-M5/M6-SN-I specifications and
is optionally compliant with IEEE 802.3 1000Base-SX.
This transceiver features the highly reliable 850 nm oxide
vertical-cavity surface-emitting laser (VCSEL) coupled to
a LC optical connector. Its small size allows for
high-density board designs that, in turn, enable greater
total aggregate bandwidth.
Key benefits
• Compliant with industry-wide
physical and optical
specifications
• Dual-rate FC performance
• Optional 1000Base-SX, Gigabit
Ethernet Compliance
• Enables higher port densities
• Proven high reliability
• In-house precision alignment
Applications
• High-speed storage area
networks
• Switch and hub interconnect
• Mass storage systems
interconnect
• Host adapter interconnect
• Computer cluster cross-connect
• Custom high-speed data pipes
Highlights
Enhanced Digital Diagnostic feature set
allows
real-time monitoring of transceiver performance and
system stability. (Optional Feature)
Bail mechanism
enables superior ergonomics and
functionality in all port configurations
Extended Voltage and Extended Temperature
enable deployment for applications requiring a larger
range of environmental conditions and a lower
sensitivity to power supply variations. (Optional
Feature)
Puggability enables just-in-time (JIT) inventory
control of populated cards
by allowing separate
control of cards and transceivers
MSA-compliant small form factor footprint
is half
the size of current implementations, doubling port
density and reducing overall system cost
Serial ID
allows customer and vendor system
specific information to be placed in transceiver
All-metal housing
provides superior EMI
performance
05000946R2
February 2004
2 Gbps 850 nm SFP Transceivers with Optional Triple-Rate, Extended
Temperature & Voltage, and Digital Diagnostics
PL-XPL-Vx-S2x-xx features
• Utilizes a highly reliable, high speed,
850 nm, oxide VCSEL
• Hot pluggable
• Digital Diagnostics available; SFF-
8472 rev 9.3 compliant
• Compliant with Fibre Channel 200-
M5/M6-SN-I and 100-M5/M6-SN-I
• Compliance with IEEE 802.3
1000Base-SX available
• Interoperable with all CD-based
1 Gbps transeivers
• Low nominal power consumption
(< 550 mW)
• -20
ο
C to 85
ο
C operating temperature
range available
• Single +3.3 V power supply
•
±
10% extended operating voltage
range available
• Bit error rate < 1x10
-12
• OC transmit disable, loss of signal
and transmitter fault functions
• CDRH and IEC 60825-1 Class 1 laser
eye safe
• FCC Class B compliant
• ESD Class 2 per MIL-STD 883
Method 3015
.488 12.40
2.224 56.50
.539 13.70
An eye-safe, cost effective serial transceiver, the
PL-XPL-Vx-S2x-xx features a small, low power, pluggable
package that manufacturers can upgrade in the field, adding
bandwidth incrementally. The robust mechanical design
features a unique all-metal housing that provides superior EMI
shielding.
Ordering information
Part Number:
PL-XPL-VC-S23-11
PL-XPL-VE-S24-11
PL-XPL-VE-S24-31
PL-XPL-VE-S24-23
PL-XPL-VE-S24-21
PL-XPL-VC-S23-21
PL-XPL-VC-S23-12
PL-XPL-VC-S23-22
PL-XPL-VE-S24-2C
Contact
Information:
Temp. Range:
0 to 70
ο
C
-20 to 85
ο
C
-5 to 70
ο
C
-5 to 70
ο
C
-20 to 85
ο
C
0 to 70
ο
C
0 to 70
ο
C
0 to 70
ο
C
-20 to 85
ο
C
Power
Supply
Tolerance:
±5%
±10%
±10%
±10%
±10%
±5%
±5%
±5%
±10%
Dual Rate
Fiber
Channel:
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1000Base-SX
Compliant
Digital
Diagnostics
PCI
Compliant
Picolight Incorporated
4665 Nautilus Court S
Boulder, CO 80301
Tel: 303.530.3189
Email: sales@picolight.com
Web site: www.picolight.com
February 2004
Page 2 of 23
05000946R2
2 Gbps 850 nm SFP Transceivers with Optional Triple-Rate, Extended
Temperature & Voltage, and Digital Diagnostics
Section 1
Functional description
The PL-XPL-Vx-S2x-xx 850 nm VCSEL Gigabit Transceiver is designed to transmit and receive 8B/
10B encoded serial optical data over 50/125
µm
or 62.5/125
µm
multimode optical fiber.
Transmitter
The transmitter converts 8B/10B encoded serial PECL electrical data into serial optical data meeting
the requirements of 100-M5/M6-SN-I and 200-M5/M6-SN-I Fibre Channel and 1000Base-SX (Optional
Feature) specifications. Transmit data lines (TD+ & TD-) are internally AC coupled with 100
Ω
differential termination.
An open collector compatible Transmit Disable (TD
is
) is provided. This pin is internally terminated with
a 10 kΩ resistor to Vcc
T
. A logic “1,” or no connection on this pin will disable the laser from
transmitting. A logic “0” on this pin provides normal operation.
The transmitter has an internal PIN monitor diode that is used to ensure constant optical power output
across supply voltage and temperature variations.
An open collector compatible Transmit Fault (TFault) is provided. The Transmit Fault signal must be
pulled high on the host board for proper operation. A logic “1” output from this pin indicates that a
transmitter fault has occurred, or the part is not fully seated and the transmitter is disabled. A logic “0”
on this pin indicates normal operation.
Receiver
The receiver converts 8B/10B encoded serial optical data into serial PECL electrical data. Receive
data lines (RD+ & RD-) are internally AC coupled with 100
Ω
differential source impedance, and must
be terminated with a 100
Ω
differential load.
An open collector compatible Loss of Signal is provided. The LOS must be pulled high on the host
board for proper operation. A logic “0” indicates that light has been detected at the input to the receiver
(see Section 3.4 Optical characteristic, Loss of Signal Assert/Deassert Time on page 10). A logic “1”
output indicates that insufficient light has been detected for proper operation.
Power supply filtering is recommended for both the transmitter and receiver. Filtering should be placed
on the host assembly as close to the Vcc pins as possible for optimal performance.
Recommended “Application Schematics” are shown in Figure 3 on page 6.
05000946R2
Page 3 of 23
February 2004
2 Gbps 850 nm SFP Transceivers with Optional Triple-Rate, Extended
Temperature & Voltage, and Digital Diagnostics
Figure 1
Block diagram
16 Transmitter Power Supply
10K
3 Transmitter Disable In
Vcc_T
Vcc_T
TDis
TD+
18 Transmitter
Positive Data In
50
TOSA
Laser Driver
50
TD-
T_Gnd
T_Fault
19 Transmitter
Negative Data In
2 Transmitter Fault Out
1, 17, 20 Transmitter
Signal Ground
Management
SCL
Processor
SDA
5 MOD_DEF(1) Serial ID Clock
4 MOD_DEF(2) Serial ID Data
6 MOD_DEF(0)
15 Receiver Power Supply
EEPROM
Vcc_R
Vcc_R
RD-
50
12 Receiver Negative
Data Out
RECEIVER
ROSA
RD+
R_Gnd
R_Gnd
LOS
8 Loss of Signal Out
7 Not Connected
9, 10, 11, 14 Receiver
Signal Ground
50
13 Receiver Positive
Data Out
February 2004
Page 4 of 23
05000946R2
2 Gbps 850 nm SFP Transceivers with Optional Triple-Rate, Extended
Temperature & Voltage, and Digital Diagnostics
Section 2
Figure 2
Application schematics
Recommended connections to the PL-XPL-Vx-S2x-xx transceiver are shown in Table 2 below.
Recommended application schematic for the PL-XPL-Vx-S2x-xx transceiver
10K
Ω
Receiver (Tx Fault)
*
R1
50Ω
Z = 100
Ω
*
Open Collector
Driver (Tx Disable)
PECL
Driver
(TX DATA)
PSFF Host Connector
10K
Ω
1 VeeT
2 Tx Fault
10K
Ω
3 Tx Disable
4 MOD_DEF(2)
5 MOD_DEF(1)
10K
Ω
6 MOD_DEF(0)
7 NC
8 LOS
9 VeeR
10 VeeR
VeeT 20
TD- 19
TD+ 18
VeeT 17
VccT 16
VccR 15
VeeR 14
RD+ 13
RD- 12
VeeR 11
R3
50
Ω
*
Open Collector
Bidirectional
{Mod_Def(2)}
R2
50Ω
*
C3
0.1
µ
F
L1
1µH
C2
0.1
µ
F
C1
10
µF
+3.3V
Vcc
Input
Open Collector
Bidirectional
{Mod_Def(1)}
Receiver
{Mod_Def(0)}
C4
0.1µ F
L2
1µH
10µ F
PECL
Receiver
(RX DATA)
10K
Ω
Receiver (LOS)
Z = 100Ω
*
R4
50
Ω
*
Notes
Power supply filtering components should be placed as close to the V
cc
pins of the host connector as
possible for optimal performance.
PECL driver and receiver will require biasing networks. Please consult application notes from suppliers
of these components.
MOD_DEF(2) and MOD_DEF(1) should be bi-directional open collector connections in order to
implement serial ID (MOD_DEF[0,1,1]) PL-XPL-Vx-S2x-xx transceiver.
*
Transmission lines should be 100
Ω
differential traces. It is recommended that the termination resistor for
the PECL Receiver (R3 + R4) be placed beyond the input pins of the PECL Receiver. Series Source
Termination Resistors on the PECL Driver (R1+R2) should be placed as close to the driver output pins as
possible.
05000946R2
Page 5 of 23
February 2004
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