Cal Crystal Lab, Inc. / Comclok, Inc. 800-333-9825
1156 North Gilbert Street • Anaheim, CA 92801
“J” LEADED SMD CRYSTAL CLOCK OSCILLATORS
MODEL CN 3.3VDC
CP 5.0VDC
Model
Frequency Range
Frequency Stability
Operating Temperature Range
Storage Temperature Range
Current Consumption
Supply Voltage
Symmetry
Rise & Fall Time (Tr, Tf)
Logic “1”
Logic “0”
Output Load
Aging
Enable Input (optional)
DIMENSIONS
Inches
(mm)
CN
1.0MHz ~ 70.000MHz
100ppm Standard, Optional Tolerances Available
0 C ~ +70 C Extended Temperature Ranges Available
-55
o
C ~ +125
o
C
1.0MHz to 20.0MHz : 5mA ~ 15mA
20.0MHz to 70.0MHz : 15 mA ~ 40mA Max
o
o
CP
1.0MHz ~ 70.000MHz
100ppm Standard, Optional Tolerances Available
0
o
C ~ +70
o
C Extended Temperature Ranges Available
-55
o
C ~ +125
o
C
1.0MHz to 20.0MHz : 5mA ~ 15mA
20.0MHz to 70.0MHz : 15 mA ~ 40mA Max
+ 3.3VDC
±
10%
60/40 @ 50% Vcc
Optional Tolerances Available
+ 5.0VDC
±
10%
60/40 @ 50%
Optional Tolerances Available
5nSec Max
2.9VDC Min
0.5VDC Max
10 TTL / 15pF
< 5ppm per year
Enable - Logic “1” 2.0VDC Min
Disable - Logic “0” 0.5VDC Max
6nSec Max
4.5VDC Min
0.5VDC Max
10 TTL / 15pF
< 5ppm per year
Enable - Logic “1” 2.0VDC Min
Disable - Logic “0” 0.5VDC Max
CN “J” Lead SMD
#1
N.C. or E/D (TriState)
#2
GND
#3
OUTPUT
#4
3.3VDC
±
10%
CP “J” Lead SMD
N.C. or E/D (TriState)
#1
#2
GND
#3
OUTPUT
#4
5VDC
±
10%
Examples for Soldering Conditions
TTL
COMS
Tr
TF
0.4~2.4V 2.4~0.4V
0.5~4.5V 4.5~0.5V
L
0.4V
COMS 20%
H
2.4V
80%
Duty
1.4V
50%
35
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
