MDT11P0122
1
、
General Description
This EPROM-Based 8-bit micro-controller
uses a fully static CMOS technology
process to achieve higher speed and
smaller size with the low power
consumption and high noise immunity. On
chip memory includes 4K words of
EPROM, and 176 bytes of static RAM.
The application areas of this MDT11P0122
range from appliance motor control and high
speed automotive to low power remote
transmitters/receivers
and
tele-
communications processors, such as
Remote controller, small instruments, toy,
automobile and keyboard … etc.
2
、
Features
RISC CPU
Fully static design
37 single word instructions
4K x 14 program memory.
176 bytes RAM for data
25 bi-directional I/O
Eight level hardware stacks
Watchdog timer with on-chip RC
oscillator.
Interrupt capability
Timer0 : 8-bit timer with 8-bit
prescaler
Timer1 : 16-bit timer
16-bit Timer1 compare register.
Sleep mode for power saving.
PB with port change wake-up interrupt.
LCD：29 Segments,4 commons.(27 x
4 at LQFP Package)
1/2,1/3,1/4 multiplex at 1/3,1/2 bias.
2 channel comparator
3. Applications
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.1
2007/11
VER 1.0
MDT11P0122
4. IC Diagram
(1)Pin Diagram
PA2/CMPP1I
PA3/CMP1R
PA1/CMP0R
PA0/CMP0I
PD7/COM1
PD6/COM2
/MCLR
COM0
VDD
64 63 62 61 60 59
PA4/RTCC
PA5
PB1
PB0/IRQ
PC3
PC4
PC5
C1
C2
1
2
3
4
5
6
7
8
9
VSS
MDT11P0122LQ11
PB2
PB3
58 57 56 55 54 53 52 51 50 49
48 PD5/COM3
47 PG6/SEG26
46 PG5/SEG25
45 PG4/SEG24
44 PG3/SEG23
43 PG2/SEG22
42 PG1/SEG21
41 PG0/SEG20
40 PF7/SEG19
39 PF6/SEG18
38 PF5/SEG17
37 PF4/SEG16
36 PF3/SEG15
35 PF2/SEG14
34 PF1/SEG13
33 PF0/SEG12
PB4
PB5
PB7
PB6
Vlcd 2 10
Vlcd 3 11
VDD 12
VSS 13
OSCI 14
OSCO 15
PC0/T1OSCO 16
17 18 19 20 21 22
PC1/T1OSCI
PC2
NC
VLCD
PD1/SEG1
PD0/SEG0
23 24 25 26 27 28 29 30 31 32
PD2/SEG2
PD3/SEG3
PD4/SEG4
PE0/SEG5
PE1/SEG6
PE2/SEG7
PE3/SEG8
PE4/SEG9
PE5/SEG10
PE6/SEG11
Device
MDT11P0122LQ11
MDT11P0122
LCD dot
4 X 27
4 X 29
Package
64 PIN LQFP
COB
Remark
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.2
2007/11
VER 1.0
MDT11P0122
(2)pad diagram
IC substrate connect to VSS
VDD (pad 14,55), VSS (pad 15, 65) must to be connect
This specification are subject to be changed without notice. Any latest information please preview
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P.3
2007/11
VER 1.0
MDT11P0122
(3)pad Coordinates
PAD-No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
PAD Name
PA2
PA3
PA4
PA5
PB1
PB0
PC3
PC4
PC5
C1
C2
VLCD2
VLCD3
VDD
VSS
OSC1
OSC2
PC0
PC1
PC2
VLCD
PD0
PD1
PD2
PD3
PD4
PE7
PE0
PE1
PE2
PE3
PE4
PE5
X
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
73.00
173.00
273.00
373.00
473.00
573.00
673.00
773.00
873.00
973.00
1073.00
1173.00
Y
2278.00
2178.00
2078.00
1978.00
1878.00
1778.00
1678.00
1578.00
1478.00
1378.00
1278.00
1178.00
1078.00
978.00
878.00
778.00
678.00
578.00
478.00
378.00
278.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
68.00
PAD-No PAD Name
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
PE6
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PG7
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PD5
PD6
PD7
COM0
VDD
PB6
PB7
PB5
PB4
MCLRB
PB3
PB2
PA0
PA1
VSS
X
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1468.00
1357.80
1257.80
1157.80
1057.80
957.80
831.80
724.90
624.90
524.90
424.90
324.90
Y
77.00
177.00
277.00
377.00
477.00
577.00
677.00
777.00
877.00
977.00
1077.00
1177.00
1277.00
1377.00
1477.00
1577.00
1677.00
1777.00
1877.00
1977.00
2077.00
2318.00
2318.00
2318.00
2318.00
2318.00
2318.00
2318.00
2318.00
2318.00
2318.00
2318.00
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.4
2007/11
VER 1.0
MDT11P0122
5. Pin function description
Pin name
OSC1
OSC2
/MCLR
Type Buffer type
I
O
I
ST
Oscillator input
Oscillator out
Description
PA0/CMP0I
PA1/CMP0R
PA2/CMP1I
PA3/CMP1R
PA4/RTCC
PA5
I/O
I/O
I/O
I/O
I/O
I/O
TTL
TTL
TTL
TTL
ST
TTL
Reset input
Bi-directional I/O port A. Port A can be software programmed
for internal 50K ohm pull-up
PA0 ~PA3 can use TTL level I/O or Comaparator input.
Output_Lo sink current only 14mA
Can be clock input to Timer0.
Bi-directional I/O port B. Port B can be software programmed
for internal 50K ohm pull-up on all pins. PB0-PB7 can generate
interrupt on pin state change.
PB0/IRQ can be the external interrupt pin.
PB0/IRQ
PB1
PB2
PB3
PB4
PB5
PB6
PB7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
ST/TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Bi-directional I/O port C. Port C can be software programmed
for internal 100K pull-up on all pins.
PC0 can be Timer1 oscillator output or Timer1 clock input.
PC1 can be Timer1 oscillator input.
PC1
PC2
PC3
PC4
PC5
PD0/SEG00
PD1/SEG01
PD2/SEG02
PD3/SEG03
PD4/SEG04
I/O
I/O
I/O
I/O
I/O
I/O/L
I/O/L
I/O/L
I/O/L
I/O/L
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
Bi-directional I/O/LCD Driver port.
PD0~PD4 are open drain I/O or LCD Segment driver
PC2 can be Timer1 compare output.
PC0
I/O
ST
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.5
2007/11
VER 1.0
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