CMM1110-BD
RNP@š•@QXNP@gh¡@mmic@l•ž@n•Œ™ˆ@a“–’Œ‰Œˆ˜
mŒ“ŒŸ@b˜•„‡…„”‡L@i”†N@QPWYU@r•†‘’ˆ @r‡NL@h•›™š•”L@tˆŸ„™@WWPYY
tˆ’Z@RXQNYXXNTVPP@@f„ŸZ@RXQNYXXNTVQU@@žžžN“Œ“ŒŸ…˜•„‡…„”‡N†•“
ÐRPPU@mŒ“ŒŸ@b˜•„‡…„”‡L@i”†N
CELERITEK INC.
ADVANCED PRODUCT SPECIFICATIONS
PRODUCT DESCRIPTION:
2-18GHz MMIC Low Noise Amp.
PRODUCT APPLICATION:
PROJECT ENGINEER:
Amer Droubi
MASK NUMBER:
M413-17
PART NUMBER:
CMM1110-BD
BM NUMBER:
TBD
REVISION:
03
DATE:
23 Oct 2005
Main Features
Unique 2 stage Feedback LNA
Fully matched at I/P and output
DC block integrated on chip
Single bias supply with Bias Control
Noise Figure is 2.5dB typ across the band
13dBm typical P1dB at 18GHz
16.7.0dB typical linear gain
Chip size: 2.0x1.1mm
2
(4mils substrate)
Electrical specifications at room temperature. Standard bias conditions: Vdd=8V.
(
1
)
PARAMETER
SYMBOL
MIN
TYP
MAX
Operating frequency band
Linear gain
(
3
)
Glin variation over operating frequency band
Noise figure
(
2
)
Input reflection coefficient
(
3
)
Output reflection coefficient
(
3
)
Output power at 1dB compression
(
2
)
Output 3
rd
order intercept point at 10GHz
(
2
)
Output 2
nd
order intercept point at 10GHz
(
2
)
Drain Bias Voltage
Quiescent current
Thermal resistance
Stability
(
3
)
F
Glin
Glin
NF
S11
S22
P1dB
OIP3
OIP2
Vdd
Idq
Rth
Unconditionally stable
2.0
15.5
-
-
-
-
12.0
-
-
-
60
-
16.7
-
2.5
-
-
15
23.0
33.0
8
75
18.0
-
1.5
3.0
-9.0
-9.0
-
-
-
-
90
60
UNITS
GHz
dB
dB
dB
dB
dB
dBm
dBm
dBm
V
mA
°C/W
(
1
) Standard assembling. Drain dropping resistor is contained on chip for additional stability. For Vdd=8V, Vd=5.5V.
(
2
) Based on raw data taken using Celeritek’ s connectorized fixture.
(
3
) Based on rf-probe data.
Electrical specifications over operating temperature: -40÷85°C.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
P1dB variation from room temperature value
Glin variation from room temperature value
ΔP1dB
ΔGlin
-
-
-
-
0.5
0.7
dBm
dB
Absolute Maximum Ratings
(
4
)
PARAMETER
SYMBOL
MIN
RATING
MAX
UNITS
Drain voltage supply
Drain current
Dissipated power
Input power
Storage temperature
Channel temperature
Operating backside temperature
4
Vdd
Ids
Pdiss
Pin
Tstg
Tch
Tb
7
-
-
-
-50
-
-40
9
110
1.0
20
150
175
(
5
)
V
mA
W
dBm
°C
°C
°C
( ) Operation outside any of these limits can cause permanent damage.
(
5
) Calculate maximum operating temperature using the following formula: Tmax=175-(Pdiss [W] x Rth [°C/W]) [°C].
Die Dwg
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
