Except Crystal Pads. Threshold voltage for crystal pads = V
DD
/2
Except Crystal Pads
0 < V
IN
< V
DD
0 < V
IN
< V
DD
CPU, CPU/2
APIC
USB, REF
AGP, PCI
I
OL
Low-level Output Current
CPU, CPU/2
APIC
USB,REF
AGP, PCI
I
OZ
I
OZ
I
DD2
I
DD3
I
DDPD2
I
DDPD3
Output Leakage Current
Output Leakage Current
Three-state, excluding REF0
Three-state, REF0
V
OH
= 2.0V
V
OH
= 2.0V
V
OH
= 2.4V
V
OH
= 2.4V
V
OL
= 0.4V
V
OL
= 0.4V
V
OL
= 0.4V
V
OL
= 0.4V
–16
–20
–15
19
25
10
20
Min. Max. Unit
2.0
0.8
10
10
–60
–72
–51
49
58
24
49
10
150
90
160
100
200
µA
pA
mA
mA
µA
µA
mA
V
V
µA
µA
mA
–30 –100
2.5V Power Supply Current AV
DD
/V
DD33
= 3.465V, V
DD25
= 2.625V, F
CPU
= 133 MHz
3.3V Power Supply Current AV
DD
/V
DD33
= 3.465V, V
DD25
= 2.625V, F
CPU
= 133 MHz
2.5V Shutdown Current
AV
DD
/V
DD33
= 3.465V, V
DD25
= 2.625V
3.3V Shutdown Current
AV
DD
/V
DDQ3
= 3.465V, V
DD25
= 2.625V
4
CY2215
CY2215 Switching Characteristics
[4]
Over the Operating Range
Parameter
t
1
t
2
t
2
t
2
t
3
t
3
t
3
t
6
t
9
t
10
t
11
t
12
t
13
All
CPU, CPU/2,
IOAPIC
48CLK, REF
PCI, 66CLK
CPU, CPU/2,
IOAPIC
48CLK, REF
PCI, 66CLK
CPU
66CLK
PCI
CPU, 66CLK
66CLK, PCI
CPU, IOAPIC
CPU
CPU
CPU/2
IOAPIC
48CLK
66CLK
REF
CPU, PCI
Output
Description
Output Duty Cycle
[5]
Rising Edge Rate
Rising Edge Rate
Rising Edge Rate
Falling Edge Rate
Falling Edge Rate
Falling Edge Rate
CPU-CPU Skew
66CLK-66CLK Skew
PCI-PCI Skew
CPU-66CLK Clock Skew
66CLK-PCI Clock Skew
IOAPIC-CPU Clock Skew
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Settle Time
CPU and PCI clock stabilization from
power-up
t
1A
/ t
1B
Between 0.4V and 2.0V
Between 0.4V and 2.4V
Between 0.4V and 2.4V
Between 2.0V and 0.4V
Between 2.4V and 0.4V
Between 2.4V and 0.4V
Measured at 1.25V
Measured at 1.5V
Measured at 1.5V
CPU leads. Measured at 1.25V for
2.5V clocks and 1.5V for 3.3V clocks
66CLK leads. Measured at 1.5V
APIC leads. Measured at 1.25V
With all outputs running
With the 48CLK output turned off
0
1.5
1.5
Test Conditions
Min.
45
1.0
0.5
1.0
1.0
0.5
1.0
Max.
55
4.0
2.0
4.0
4.0
2.0
4.0
175
250
500
1.5
4.0
4.0
250
200
250
500
500
500
1000
3
Unit
%
V/ns
V/ns
V/ns
V/ns
V/ns
V/ns
ps
ps
ps
ns
ns
ns
ps
ps
ps
ps
ps
ps
ps
ms
Notes:
4. All parameters specified with fully loaded outputs with the exception of PCI outputs where the sum of all loads on the PCI outputs are not to exceed 240 pF
and AGP outputs should not exceed 75 pF total lump load.
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