Operating Temperature Range ......................... -40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................ -60°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) .......................................+260°C
Absolute Maximum Ratings
IN, GATE, GATEP .................................................-0.3V to +80V
SHDN, CLEAR
...........................................-0.3V to (V
IN
+ 0.3V)
POK, OUTFB.........................................................-0.3V to +80V
GATE to OUTFB....................................................-0.3V to +12V
GATEP to IN ..........................................................-12V to +0.3V
OVSET, UVSET, POKSET ....................................-0.3V to +12V
Current Sink/Source (All Pins) ...........................................50mA
All Other Pins to GND ................................-0.3V to (V
IN
+ 0.3V)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
6 TDFN-EP
PACKAGE CODE
Outline Number
Land Pattern Number
Thermal Resistance, Single-Layer Board:
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
42°C/W
9
55°C/W
9°C/W
21-0137
90-0058
T633+2
8 TDFN-EP
PACKAGE CODE
Outline Number
Land Pattern Number
Thermal Resistance, Single-Layer Board:
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
41°C/W
8°C/W
54°C/W
8°C/W
21-0137
90-0058
T833+2
For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages.
Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
www.maximintegrated.com
Maxim Integrated
│
2
MAX6495–MAX6499
72V, Overvoltage-Protection
Switches/Limiter Controllers
with an External MOSFET
Electrical Characteristics
PARAMETER
Supply Voltage Range
Input Supply Current
IN Undervoltage Lockout
IN Undervoltage Lockout
Hysteresis
OVSET Threshold Voltage
(MAX6495/MAX6496)
OVSET Threshold Hysteresis
(MAX6495/MAX6496)
OVSET Threshold Voltage
(MAX6497/MAX6498)
OVSET Threshold Voltage
(MAX6499)
UVSET Threshold Voltage
(MAX6499)
OVSET/UVSET Threshold
Hysteresis (MAX6499)
POKSET Threshold Voltage
(MAX6497/MAX6498)
POKSET Threshold
Hysteresis (MAX6497/
MAX6498)
OVSET, UVSET, POKSET
Input Current
Startup Response Time
GATE Rise Time
OVSET to GATE Propagation
Delay
UVSET to GATE, POKSET to
POK Propagation Delay
GATE Output High Voltage
GATE Output Low Voltage
GATE Charge-Pump Current
GATE to OUTFB Clamp
Voltage
t
OV
V
IN
I
IN
(V
IN
= 14V, C
GATE
= 6nF, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
SYMBOL
CONDITIONS
SHDN
= high
No load
SHDN
= low (MAX6497/MAX6498/
MAX6499)
SHDN
= low (MAX6495/MAX6496)
V
IN
rising, enables GATE
V
IN
falling, disables GATE
V
TH+
V
TH-
V
HYST
V
TH+
V
TH+
V
TH+
V
TH-
V
HYST
V
TH-
V
TH-
OVSET rising
OVSET falling
OVSET falling
OVSET rising
OVSET falling
OVSET rising
OVSET falling
UVSET rising
UVSET falling
OVSET falling
1.22
1.22
1.22
0.494
1.22
4.75
MIN
5.5
100
15
24
5
155
1.24
1.18
5
0.505
0.13
1.24
1.18
1.24
1.18
5
1.24
1.18
5
-50
SHDN
rising (Note 2)
GATE rising from GND to V
OUTFB
+ 8V,
OUTFB = GND
SET rising from V
TH
- 100mV to V
TH
+ 100mV
POKSET, UVSET falling from V
TH
+ 100mV to
V
TH
- 100mV
V
OH
V
OL
I
GATE
V
CLMP
V
OUTFB
= V
IN
= 5.5V, R
GATE
to IN = 1MΩ
GATE sinking 15mA, OUTFB = GND
GATE = GND
V
OUTFB
= V
IN
, V
IN
≥ 14V, R
GATE
to IN = 1MΩ
V
IN
= 5.5V, GATE sinking 1mA, OUTFB = GND
12
V
IN
+ 8
20
V
IN
+ 3.4 V
IN
+ 3.8 V
IN
+ 4.2
V
IN
+ 10
V
IN
+ 11
1
0.9
100
18
100
1
0.6
+50
1.26
1.26
1.26
0.518
1.26
TYP
MAX
72.0
150
24
32
5.25
V
mV
V
%
V
V
V
%
V
%
nA
µs
ms
µs
µs
V
V
µA
V
µA
UNITS
V
V
POKSET+
POKSET rising
V
POKSET-
POKSET falling
V
HYST
I
SET
t
START
POKSET falling
www.maximintegrated.com
Maxim Integrated
│
3
MAX6495–MAX6499
72V, Overvoltage-Protection
Switches/Limiter Controllers
with an External MOSFET
Electrical Characteristics (continued)
PARAMETER
IN to GATEP Output Low
Voltage
IN to GATEP Clamp Voltage
SHDN, CLEAR
Logic-High
Input Voltage
SHDN, CLEAR
Logic-Low
Input Voltage
SHDN
Input Pulse Width
CLEAR
Input Pulse Width
SHDN, CLEAR
Input
Pulldown Current
Thermal Shutdown
Thermal-Shutdown
Hysteresis
POKSET to POK Delay
(MAX6497/MAX6498)
POK Output Low Voltage
(MAX6497/MAX6498)
POK Leakage Current
(MAX6497/MAX6498)
V
OL
V
IH
V
IL
SYMBOL
(V
IN
= 14V, C
GATE
= 6nF, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
CONDITIONS
I
GATEP_SINK
= 75µA, I
GATEP_SOURCE
= 1µA
V
IN
= 24V, I
GATEP_SOURCE
= 10µA
MIN
7.5
12
1.4
V
0.4
7
0.5
SHDN
is Internally pulled down to GND
(Note 3)
0.6
1.0
+160
20
35
V
IN
≥ 14V, POKSET = GND, I
SINK
= 3.2mA
V
POKSET
= 14V
0.4
0.4
100
V
IN
≥ 2.8V, POKSET = GND, I
SINK
= 100µA
1.4
µs
µs
µA
°C
°C
µs
V
nA
TYP
MAX
11.7
18
UNITS
V
V
Note 1:
Specifications to T
A
= -40°C are guaranteed by design and not production tested.
Note 2:
The MAX6495–MAX6499 power up with the external MOSFET in off mode (V
GATE
= GND). The external MOSFET turns on
t
START
after all input conditions are valid.
Note 3:
For accurate overtemperature-shutdown performance, place the device in close thermal contact with the external MOSFET.
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