19-2718; Rev 2; 4/09
2.488Gbps 1:4 Demultiplexer with Clock and
Data Recovery and Limiting Amplifier
General Description
The MAX3882A is a deserializer combined with clock
and data recovery and limiting amplifier ideal for con-
verting 2.488Gbps serial data to 4-bit-wide, 622Mbps
parallel data for SDH/SONET applications. The device
accepts serial NRZ input data as low as 10mV
P-P
of
2.488Gbps and generates four parallel LVDS data out-
puts at 622Mbps. Included is an additional high-speed
serial data input for system loopback diagnostic test-
ing. For data acquisition, the MAX3882A does not
require an external reference clock. However, if need-
ed, the loopback input can be connected to an external
reference clock of 155MHz or 622MHz to maintain a
valid clock output in the absence of input data transi-
tions. Additionally, a TTL-compatible loss-of-lock output
is provided. The device provides a vertical threshold
adjustment to compensate for optical noise generated
by EDFAs in WDM transmission systems. The
MAX3882A operates from a single +3.3V supply and
consumes 610mW.
The MAX3882A’s jitter performance exceeds all SDH/
SONET specifications. The device is available in a 6mm
✕
6mm, 36-pin TQFN package.
Features
♦
No Reference Clock Required for Data Acquisition
♦
Serial Input Rate: 2.488Gbps
♦
Fully Integrated Clock and Data Recovery with
Limiting Amplifier and 1:4 Demultiplexer
♦
Parallel Output Rate: 622Mbps
♦
Differential Input Range: 10mV
P-P
to 1.6V
P-P
without Threshold Adjust
♦
Differential Input Range: 50mV
P-P
to 600mV
P-P
with Threshold Adjust
♦
0.65UI High-Frequency Jitter Tolerance
♦
Loss-of-Lock (LOL) Indicator
♦
Wide Input Threshold Adjust Range: ±170mV
♦
Maintain Valid Clock Output in Absence of Data
Transitions
♦
System Loopback Input Available for System
Diagnostic Testing
♦
Operating Temperature Range -40°C to +85°C
♦
Low Power Dissipation: 610mW at +3.3V
MAX3882A
Applications
SDH/SONET Receivers and Regenerators
Add/Drop Multiplexers
Digital Cross-Connects
SDH/SONET Test Equipment
DWDM Transmission Systems
PD3+
Ordering Information
PART
MAX3882AETX+
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
36 TQFN-EP*
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
Pin Configuration
PD2+
PD1+
PD0+
PD3-
PD2-
PD1-
PD0-
19
18
17
16
15
PCLK+
PCLK-
GND
V
CC
_OUT
V
CC
_VCO
FIL
V
CC
_VCO
GND
LREF
14
13
12
*EP
27
26
25
24
23
GND
TOP VIEW
22
21 20
V
CC
_OUT
GND
FREFSET
V
CC
28
29
30
31
32
33
34
35
36
Typical Application Circuits appear at end of data sheet.
V
CC
CAZ+
CAZ-
MAX3882A
V
REF
V
CTRL
11
10
+
1
GND
2
V
CC
3
SDI+
4
SDI-
5
V
CC
6
SLBI+
7
SLBI-
8
SIS
9
LOL
TQFN
*EXPOSED PAD.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
2.488Gbps 1:4 Demultiplexer with Clock and
Data Recovery and Limiting Amplifier
MAX3882A
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
CC
................................................-0.5 to +5.0V
Input Voltage Levels
(SDI+, SDI-, SLBI+, SLBI-) ...........(V
CC
- 1.0V) to (V
CC
+ 0.5V)
Input Current Levels (SDI+, SDI-, SLBI+, SLBI-)..............±20mA
LVDS Output Voltage Levels
(PCLK±, PD_±).......................................-0.5V to (V
CC
+ 0.5V)
Voltage at
LOL,
SIS,
LREF,
V
REF
, FIL, CAZ+,
CAZ-, V
CTRL
, FREFSET ..........................-0.5V to (V
CC
+ 0.5V)
Continuous Power Dissipation (T
A
= +70°C)
36-Pin TQFN (derate 35.7mW/°C above +70°C) ......2856mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-55°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0 to +3.6V, T
A
= -40°C to +85°C. Typical values are at +3.3V and at T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
Supply Current
Single-Ended Input Voltage
Range
Input Common-Mode Voltage
Range
Input Termination to V
CC
Differential Input Voltage Range
with Threshold Adjust Enabled
SDI+, SDI-
Threshold Adjustment Range
Threshold-Control Voltage
Threshold-Control Linearity
Threshold Setting Accuracy
Threshold Setting Stability
V
REF
Voltage Output
LVDS Output High Voltage
LVDS Output Low Voltage
LVDS Differential Output Voltage
LVDS Change in Magnitude of
Differential Output Voltage for
Complementary States
LVDS Offset Output Voltage
LVDS Change in Magnitude of
Output Offset Voltage for
Complementary States
|V
OS
|
V
OH
V
OL
|V
OD
|
0.925
250
400
Figure 2
15mV
|V
TH
|
80mV
170mV
80mV
<
|V
TH
|
R
L
= 50k
-18
-6
-12
2.14
2.2
V
TH
V
CTRL
R
IN
Figure 2
Figure 2
(Note 2)
SYMBOL
I
CC
V
IS
Figure 1
Figure 1
V
CC
-
0.8
V
CC
-
0.4
42.5
100
-170
0.302
±5
+18
+6
+12
2.24
1.475
50
CONDITIONS
MIN
TYP
185
MAX
230
V
CC
+
0.4
V
CC
57.5
600
+170
2.097
mV
P-P
mV
V
%
mV
mV
V
V
V
mV
UNITS
mA
V
V
|V
OD
|
1.125
25
1.275
25
mV
V
mV
2
_______________________________________________________________________________________
2.488Gbps 1:4 Demultiplexer with Clock and
Data Recovery and Limiting Amplifier
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0 to +3.6V, T
A
= -40°C to +85°C. Typical values are at +3.3V and at T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
LVDS Differential Output
Impedance
LVDS Output Current
LVTTL Input High Voltage
LVTTL Input Low Voltage
LVTTL Input Current
LVTTL Output High Voltage
LVTTL Output Low Voltage
V
OH
V
OL
I
OH
= +20μA
I
OL
= -1mA
V
IH
V
IL
-10
2.4
0.4
Short together or short to GND
2.0
0.8
+10
SYMBOL
CONDITIONS
MIN
80
TYP
MAX
120
12
mA
V
V
μA
V
V
UNITS
MAX3882A
Note 1:
At -40°C, DC characteristics are guaranteed by design and characterization.
Note 2:
Voltage applied to V
CTRL
pin is from 0.302V to 2.097V when input threshold is adjusted from +170mV to -170mV.
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0 to +3.6V, T
A
= -40°C to +85°C. Typical values are at +3.3V and at T
A
= +25°C, unless otherwise noted.) (Note 3)
PARAMETER
Serial Input Data Rate
Differential Input Voltage
Threshold Adjust Disabled
SDI+, SDI-
Differential Input Voltage SLBI+,
SLBI-
Jitter Peaking
Jitter Transfer Bandwidth
Sinusoidal Jitter Tolerance
J
P
J
BW
f = 100kHz
f = 1MHz
f = 10MHz
Sinusoidal Jitter Tolerance with
Threshold Adjust Enabled
(Note 5)
Jitter Generation
Differential Input Return Loss
Tolerated Consecutive Identical
Digits
Acquisition Time (Note 7)
Figure 4
LOL
Assert Time
Low-Frequency Cutoff for
DC Offset Cancellation Loop
J
GEN
20log|S
11
|
f = 100kHz
f = 1MHz
f = 10MHz
(Note 6)
100kHz to 2.5GHz
2.5GHz to 4.0GHz
BER = 10
-10
0011 pattern
PRBS 2
23
- 1 pattern
Figure 4
CAZ = 0.1μF
2.3
4
3.1
0.62
0.44
f
2MHz
1.7
4.1
1.0
0.6
4.1
0.75
0.41
2.7
17
15
2000
0.6
0.62
1.5
100.0
ps
RMS
dB
Bits
ms
μs
kHz
UI
P-P
UI
P-P
V
ID
(Note 4) Figure 1
10
SYMBOL
CONDITIONS
MIN
TYP
2.488
1600
MAX
UNITS
Gbps
mV
P-P
50
800
0.1
2.0
mV
P-P
dB
MHz
_______________________________________________________________________________________
3
2.488Gbps 1:4 Demultiplexer with Clock and
Data Recovery and Limiting Amplifier
MAX3882A
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0 to +3.6V, T
A
= -40°C to +85°C. Typical values are at +3.3V and at T
A
= +25°C, unless otherwise noted.) (Note 3)
PARAMETER
Reference Clock Frequency
Reference Clock Accuracy
VCO Frequency Drift
Data Output Rate
Clock Output Frequency
Output Clock-to-Data Delay
Clock Output Duty Cycle
Clock and Data Output Rise/Fall
Time
LVDS Differential Skew
LVDS Channel-to-Channel Skew
t
R
, t
F
t
SKEW1
t
SKEW2
20% to 80%
Any differential pair
PD_±
t
CK-Q
(Note 9)
-80
45
100
50
(Note 8)
SYMBOL
CONDITIONS
FREFSET = V
CC
FREFSET = GND
MIN
TYP
155
622
±100
400
622
622
+80
55
250
50
100
MAX
UNITS
MHz
ppm
ppm
Mbps
MHz
ps
%
ps
ps
ps
Note 3:
AC characteristics are guaranteed by design and characterization.
Note 4:
Jitter tolerance is guaranteed (BER
≤
10
-10
) within this input voltage range. Input threshold adjust is disabled when V
CTRL
is
connected to V
CC
.
Note 5:
Measured with the input amplitude set at 100mV
P-P
differential swing with a 20mV offset and an input edge speed of 145ps
(4th-order Bessel filter with f
3dB
= 1.8GHz).
Note 6:
Measured with 10mV
P-P
OC-48 differential input with PRBS 2
23
- 1 and BW = 12kHz to 20MHz.
Note 7:
Measured at OC-48 data rate using a 0.068µF loop-filter capacitor.
Note 8:
Under LOL condition, the CDR clock output is set by the external reference clock.
Note 9:
Relative to the falling edge of PCLK+. See Figure 3.
4
_______________________________________________________________________________________
2.488Gbps 1:4 Demultiplexer with Clock and
Data Recovery and Limiting Amplifier
Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
RECOVERED CLOCK AND DATA
(INPUT = 2.488Gbps, 2
23
- 1
PATTERN, V
IN
= 10mV
P-P
)
MAX3882A toc01
MAX3882A
SUPPLY CURRENT vs. TEMPERATURE
250
240
SUPPLY CURRENT (mA)
230
220
210
200
190
180
170
160
0.1
-50
-25
0
25
50
75
100
10
MAX3882A toc02
JITTER TOLERANCE
(2.48832Gbps, 2
23
- 1 PATTERN,
V
IN
= 16mV
P-P
WITH ADDITIONAL
0.15UI DETERMINISTIC JITTER)
MAX3882A toc03
260
100
JITTER TOLERANCE (UI
P-P
)
10
200mV/div
1
BELLCORE
MASK
500ps/div
100
1k
10k
TEMPERATURE (°C)
JITTER FREQUENCY (Hz)
JITTER TOLERANCE vs. INPUT AMPLITUDE
(2.48832Gbps, 2
23
- 1 PATTERN, WITH
ADDITIONAL 0.15UI DETERMINISTIC JITTER)
MAX3882A toc04
JITTER TRANSFER
MAX3882A toc05
PARALLEL CLOCK OUTPUT JITTER
f
CLK
= 622.08MHz
TOTAL WIDEBAND
RMS JITTER = 2.720ps
PEAK-TO-PEAK
JITTER = 20.80ps
MAX3882A toc06
MAX3882A toc09
0.6
0.5
JITTER TOLERANCE (UI
P-P
)
JITTER FREQUENCY = 10MHz
0.4
0.3
0.2
0.1
0
1
10
100
1000
5
0
-5
TRANSFER (dB)
-10
-15
-20
-25
-30
-35
-40
BELLCORE
MASK
10,000
1
10
100
1000
10,000
20ps/div
INPUT AMPLITUDE (mV
P-P
)
JITTER FREQUENCY (kHz)
BIT-ERROR RATE vs. INPUT AMPLITUDE
MAX3882A toc07
PULLIN RANGE
2.9
2.8
FREQUENCY (GHz)
2.7
2.6
dB
2.5
2.4
2.3
2.2
2.1
2.0
-40
-40
-15
10
35
60
85
0
-20
-30
-10
MAX3882A toc08
S11
20
10
0
1.00E-04
1.00E-05
BIT-ERROR RATIO
1.00E-06
1.00E-07
1.00E-08
1.00E-09
1.00E-10
1.00E-11
1
2
3
4
5
INPUT VOLTAGE (mV
P-P
)
3.0
500 1000 1500 2000 2500 3000 3500 4000
FREQUENCY (MHz)
AMBIENT TEMPERATURE (°C)
_______________________________________________________________________________________
5
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