CMLDM7003E
CMLDM7003JE
ENHANCED SPECIFICATION
SURFACE MOUNT SILICON
DUAL N-CHANNEL
ENHANCEMENT-MODE
MOSFETS
w w w. c e n t r a l s e m i . c o m
SOT-563 CASE
FEATURES
• ESD protected up to 2kV
MAXIMUM RATINGS:
(TA=25°C)
Drain-Source Voltage
Drain-Gate Voltage
Gate-Source Voltage
Continuous Drain Current
Maximum Pulsed Drain Current
Power Dissipation (Note 1)
Power Dissipation (Note 2)
Power Dissipation (Note 3)
Operating and Storage Junction Temperature
Thermal Resistance
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMLDM7003E
and CMLDM7003JE are dual N-Channel enhancement-
mode MOSFETs, manufactured by the N-Channel
DMOS Process, designed for high speed pulsed
amplifier and driver applications. The CMLDM7003E
utilizes the USA pinout configuration, while the
CMLDM7003JE utilizes the Japanese pinout
configuration. These special dual transistor devices
offer low drain-source on state resistance (rDS(ON))
and ESD protection up to 2kV.
MARKING CODES: CMLDM7003E: C73
CMLDM7003JE: C7J
SYMBOL
VDS
VDG
VGS
ID
IDM
PD
PD
PD
TJ, Tstg
Θ
JA
50
50
12
280
1.5
350
300
150
-65 to +150
357
UNITS
V
V
V
mA
A
mW
mW
mW
°C
°C/W
ELECTRICAL CHARACTERISTICS PER TRANSISTOR:
(TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
♦
IGSSF, IGSSR
VGS=5.0V
50
♦
IGSSF, IGSSR
VGS=10V
0.5
UNITS
nA
μA
μA
nA
V
V
V
Ω
Ω
Ω
mS
pF
pF
pF
♦
IGSSF, IGSSR
IDSS
BVDSS
VGS(th)
VSD
VGS=12V
VDS=50V, VGS=0
VGS=0, ID=10μA
VDS=VGS, ID=250μA
VGS=0, IS=115mA
VGS=1.8V, ID=50mA
VGS=2.5V, ID=50mA
VGS=5.0V, ID=50mA
VDS=10V, ID=200mA
VDS=25V, VGS=0, f=1.0MHz
VDS=25V, VGS=0, f=1.0MHz
VDS=25V, VGS=0, f=1.0MHz
1.0
50
50
0.49
1.6
1.3
1.1
200
5.0
50
25
1.2
1.4
2.3
1.9
1.5
♦
rDS(ON)
♦
rDS(ON)
♦
rDS(ON)
gFS
Crss
Ciss
Coss
♦
Enhanced specification
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm
2
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm
2
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm
2
R5 (8-June 2015)
CMLDM7003E
CMLDM7003JE
ENHANCED SPECIFICATION
SURFACE MOUNT SILICON
DUAL N-CHANNEL
ENHANCEMENT-MODE
MOSFETS
ELECTRICAL
SYMBOL
Qg(tot)
Qgs
Qgd
CHARACTERISTICS PER TRANSISTOR
TEST CONDITIONS
VDS=25V, VGS=4.5V, ID=100mA
VDS=25V, VGS=4.5V, ID=100mA
VDS=25V, VGS=4.5V, ID=100mA
- Continued:
(TA=25°C unless otherwise noted)
TYP
MAX
UNITS
0.764
nC
0.148
0.156
nC
nC
SOT-563 CASE - MECHANICAL OUTLINE
PIN CONFIGURATIONS
CMLDM7003E
(USA Pinout)
CMLDM7003JE
(Japanese Pinout)
LEAD CODE:
1) Gate Q1
2) Source Q1
3) Drain Q2
4) Gate Q2
5) Source Q2
6) Drain Q1
MARKING CODE: C73
LEAD CODE:
1) Source Q1
2) Gate Q1
3) Drain Q2
4) Source Q2
5) Gate Q2
6) Drain Q1
MARKING CODE: C7J
R5 (8-June 2015)
w w w. c e n t r a l s e m i . c o m
CMLDM7003E
CMLDM7003JE
ENHANCED SPECIFICATION
SURFACE MOUNT SILICON
DUAL N-CHANNEL
ENHANCEMENT-MODE
MOSFETS
TYPICAL ELECTRICAL CHARACTERISTICS
R5 (8-June 2015)
w w w. c e n t r a l s e m i . c o m
CMLDM7003E
CMLDM7003JE
ENHANCED SPECIFICATION
SURFACE MOUNT SILICON
DUAL N-CHANNEL
ENHANCEMENT-MODE
MOSFETS
SERVICES
• Bonded Inventory
• Custom Electrical Screening
• Custom Electrical Characteristic Curves
• SPICE Models
• Custom Packaging
• Package Base Options
• Custom Device Development / Multi Discrete Modules (MDM™)
• Bare Die Available for Hybrid Applications
LIMITATIONS AND DAMAGES DISCLAIMER:
In no event shall Central be liable for any collateral, indirect,
punitive, incidental, consequential, or exemplary damages in connection with or arising out of a purchase order
or contract or the use of products provided hereunder, regardless of whether Central has been advised of
the possibility of such damages. Excluded damages shall include, but not be restricted to: cost of removal or
reinstallation, rework, ancillary costs to the procurement of substitute products, loss of profits, loss of savings, loss
of use, loss of data, or business interruption. No claim, suit, or action shall be brought against Central more than
two (2) years after the related cause of action has occurred.
In no event shall Central’s aggregate liability from any warranty, indemnity, or other obligation arising out of or in
connection with a purchase order or contract, or any use of any Central product provided hereunder, exceed the
total amount paid to Central for the specific products sold under a purchase order or contract with respect to which
losses or damages are claimed. The existence of more than one (1) claim against the specific products sold to
Buyer under a purchase order or contract shall not enlarge or extend this limit.
Buyer understands and agrees that the foregoing liability limitations are essential elements of a purchase order
or contract and that in the absence of such limitations, the material and economic terms of the purchase order or
contract would be substantially different.
R5 (8-June 2015)
w w w. c e n t r a l s e m i . c o m
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
