EVALUATION KIT AVAILABLE
MAX1304–MAX1306
MAX1308–MAX1310
MAX1312–MAX1314
General Description
8-/4-/2-Channel, 12-Bit, Simultaneous-
Sampling ADCs with ±10V, ±5V, and 0 to +5V
Analog Input Ranges
Features
●
Up to Eight Channels of Simultaneous Sampling
• 8ns Aperture Delay
• 100ps Channel-to-Channel T/H Match
●
Extended Input Ranges
• 0 to +5V (MAX1304/MAX1305/MAX1306)
• -5V to +5V (MAX1308/MAX1309/MAX1310)
• -10V to +10V (MAX1312/MAX1313/MAX1314)
●
Fast Conversion Time
• One Channel in 0.72μs
• Two Channels in 0.9μs
• Four Channels in 1.26μs
• Eight Channels in 1.98μs
●
High Throughput
• 1075ksps/Channel for One Channel
• 901ksps/Channel for Two Channels
• 680ksps/Channel for Four Channels
• 456ksps/Channel for Eight Channels
●
±1 LSB INL, ±0.9 LSB DNL (max)
●
84dBc SFDR, -86dBc THD, 71dB SINAD,
f
IN
= 500kHz at 0.4dBFS
●
12-Bit, 20MHz, Parallel Interface
●
Internal or External Clock
●
+2.5V Internal Reference or +2.0V to +3.0V
External Reference
●
+5V Analog Supply, +3V to +5V Digital Supply
• 55mA Analog Supply Current
• 1.3mA Digital Supply Current
• Shutdown and Power-Saving Modes
●
48-Pin LQFP Package (7mm x 7mm Footprint)
The MAX1304–MAX1306/MAX1308–MAX1310/MAX1312
–MAX1314 12-bit, analog-to-digital converters (ADCs)
offer eight, four, or two independent input channels.
Independent track-and-hold (T/H) circuitry provides simul-
taneous sampling for each channel. The MAX1304/
MAX1305/MAX1306 provide a 0 to +5V input range
with ±6V fault-tolerant inputs. The MAX1308/MAX1309/
MAX1310 provide a ±5V input range with ±16.5V fault-
tolerant inputs. The MAX1312/MAX1313/MAX1314 have
a ±10V input range with ±16.5V fault-tolerant inputs.
These ADCs convert two channels in 0.9μs, and up to
eight channels in 1.98μs, with an 8-channel throughput of
456ksps per channel. Other features include a 20MHz T/H
input bandwidth, internal clock, internal (+2.5V) or external
(+2.0V to +3.0V) reference, and power-saving modes.
A 20MHz, 12-bit, bidirectional parallel data bus provides
the conversion results and accepts digital inputs that acti-
vate each channel individually.
All devices operate from a +4.75V to +5.25V analog sup-
ply and a +2.7V to +5.25V digital supply and consume
57mA total supply current when fully operational.
Each device is available in a 48-pin 7mm x 7mm LQFP
package and operates over the extended -40°C to +85°C
temperature range.
Applications
●
●
●
●
●
●
SIN/COS Position Encoder
Multiphase Motor Control
Multiphase Power Monitoring
Power-Grid Synchronization
Power-Factor Monitoring
Vibration and Waveform Analysis
PART
INPUT RANGE (V)
0 to +5
0 to +5
0 to +5
±5
±5
±5
±10
±10
±10
CHANNEL COUNT
8
4
2
8
4
2
8
4
2
Ordering Information
PART
MAX1304ECM+
MAX1305ECM+
MAX1306ECM+
MAX1308ECM+
MAX1309ECM+
MAX1310ECM+
MAX1312ECM+
MAX1313ECM+
MAX1314ECM+
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
48 LQFP
Selector Guide
MAX1304ECM
MAX1305ECM
MAX1306ECM
MAX1308ECM
MAX1309ECM
MAX1310ECM
MAX1312ECM
MAX1313ECM
MAX1314ECM
+Denotes lead(Pb)-free/RoHS-compliant package.
Pin Configurations appear at end of data sheet.
19-3052; Rev 6; 2/15
MAX1304–MAX1306
MAX1308–MAX1310
MAX1312–MAX1314
Absolute Maximum Ratings
8-/4-/2-Channel, 12-Bit, Simultaneous-
Sampling ADCs with ±10V, ±5V, and 0 to +5V
Analog Input Ranges
REF+, COM, REF- to AGND ...................-0.3V to (V
AVDD
+ 0.3V)
Maximum Current into Any Pin Except AVDD, DVDD, AGND,
DGND............................................................................±50mA
Continuous Power Dissipation (T
A
= +70°C)
LQFP (derate 22.7mW/°C above +70°C).................1818.2mW
Operating Temperature Range...............................-40°C to +85°C
Junction Temperature.........................................................+150°C
Storage Temperature Range ................................-65°C to +150°C
Lead Temperature (soldering, 10s)....................................+300°C
Soldering Temperature (reflow)..........................................+260°C
AVDD to AGND.........................................................-0.3V to +6V
DVDD to DGND........................................................-0.3V to +6V
AGND to DGND.....................................................-0.3V to +0.3V
CH0–CH7, I.C. to AGND (MAX1304/MAX1305/MAX1306)........±6V
CH0–CH7, I.C. to AGND (MAX1308/MAX1309/MAX1310)...±16.5V
CH0–CH7, I.C. to AGND (MAX1312/MAX1313/MAX1314)..±16.5V
D0–D11 to DGND..................................-0.3V to (V
DVDD
+ 0.3V)
EOC, EOLC, RD, WR, CS
to DGND......-0.3V to (V
DVDD
+ 0.3V)
CONVST, CLK, SHDN,
CHSHDN
to DGND -0.3V to (V
DVDD
+ 0.3V)
INTCLK/EXTCLK to AGND .....................-0.3V to (V
AVDD
+ 0.3V)
REF
MS
, REF, MSV to AGND ...................-0.3V to (V
AVDD
+ 0.3V)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
AVDD
= +5V, V
DVDD
= +3V, V
AGND
= V
DGND
= 0V, V
REF
= V
REFMS
= +2.5V (external reference), C
REF
= C
REFMS
= 0.1μF, C
REF+
= C
REF
- = 0.1μF, C
REF+-to-REF-
= 2.2μF || 0.1μF, C
COM
= 2.2μF || 0.1μF, C
MSV
= 2.2μF || 0.1μF (unipolar devices), MSV = AGND
(bipolar devices), f
CLK
= 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C. See Figures 3 and 4.)
PARAMETER
STATIC PERFORMANCE (Note 1)
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset-Error Matching
Offset-Error Temperature Drift
Gain Error
Gain-Error Matching
Gain-Error Temperature Drift
DYNAMIC PERFORMANCE at f
IN
= 500kHz, A
IN
= -0.4dBFS (Note 2)
Signal-to-Noise Ratio
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
ANALOG INPUTS (CH0 through CH7)
MAX1304/MAX1305/MAX1306
Input Voltage
V
CH
MAX1308/MAX1309/MAX1310
MAX1312/MAX1313/MAX1314
0
-5
-10
+5
+5
+10
V
SNR
SINAD
THD
SFDR
80
68
68
71
71
-86
84
86
-80
dB
dB
dBc
dBc
dB
Between all channels
N
INL
DNL
(Note 2)
No missing codes (Note 2)
Unipolar, 0x000 to 0x001
Bipolar, 0xFFF to 0x000
Unipolar, between all channels
Bipolar, between all channels
Unipolar, 0x000 to 0x001
Bipolar, 0xFFF to 0x000
12
±0.5
±0.3
±3
±3
±9
±9
7
7
±2
±3
4
±16
±14
±1.0
±0.9
±16
±16
±20
±20
Bits
LSB
LSB
LSB
LSB
ppm/°C
LSB
LSB
ppm/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
www.maximintegrated.com
Maxim Integrated
│
2
MAX1304–MAX1306
MAX1308–MAX1310
MAX1312–MAX1314
Electrical Characteristics (continued)
8-/4-/2-Channel, 12-Bit, Simultaneous-
Sampling ADCs with ±10V, ±5V, and 0 to +5V
Analog Input Ranges
(V
AVDD
= +5V, V
DVDD
= +3V, V
AGND
= V
DGND
= 0V, V
REF
= V
REFMS
= +2.5V (external reference), C
REF
= C
REFMS
= 0.1μF, C
REF+
= C
REF
- = 0.1μF, C
REF+-to-REF-
= 2.2μF || 0.1μF, C
COM
= 2.2μF || 0.1μF, C
MSV
= 2.2μF || 0.1μF (unipolar devices), MSV = AGND
(bipolar devices), f
CLK
= 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C. See Figures 3 and 4.)
PARAMETER
Input Resistance
(Note 3)
SYMBOL
R
CH
CONDITIONS
MAX1304/MAX1305/MAX1306
MAX1308/MAX1309/MAX1310
MAX1312/MAX1313/MAX1314
MAX1304/MAX1305/MAX1306
Input Current
(Note 3)
I
CH
MAX1308/MAX1309/MAX1310
MAX1312/MAX1313/MAX1314
Input Capacitance
TRACK/HOLD
One channel selected for conversion
External-Clock Throughput Rate
(Note 4)
f
TH
Two channels selected for conversion
Four channels selected for conversion
Eight channels selected for conversion
One channel selected for conversion
Internal-Clock Throughput Rate
(Note 4, Table 1)
Small-Signal Bandwidth
Full-Power Bandwidth
Aperture Delay
Aperture-Delay Matching
Aperture Jitter
INTERNAL REFERENCE
REF Output Voltage
Reference Output-Voltage
Temperature Drift
REF
MS
Output Voltage
REF+ Output Voltage
COM Output Voltage
REF- Output Voltage
Differential Reference Voltage
V
REFMS
V
REF+
V
COM
V
REF-
V
REF+
-
V
REF
-
2.475
V
REF
2.475
2.500
30
2.500
3.850
2.600
1.350
2.500
2.525
2.525
V
ppm/°C
V
V
V
V
V
t
AJ
t
AD
f
TH
Two channels selected for conversion
Four channels selected for conversion
Eight channels selected for conversion
1075
901
680
456
983
821
618
413
20
20
8
100
50
MHz
MHz
ns
ps
ps
RMS
ksps
ksps
C
CH
V
CH
= +5V
V
CH
= 0V
V
CH
= +5V
V
CH
= -5V
V
CH
= +10V
V
CH
= -10V
-1.13
-1.16
-0.157
MIN
TYP
7.58
8.66
14.26
0.54
-0.12
0.29
-0.87
0.56
-0.85
15
pF
0.74
0.39
mA
0.72
kΩ
MAX
UNITS
www.maximintegrated.com
Maxim Integrated
│
3
MAX1304–MAX1306
MAX1308–MAX1310
MAX1312–MAX1314
Electrical Characteristics (continued)
8-/4-/2-Channel, 12-Bit, Simultaneous-
Sampling ADCs with ±10V, ±5V, and 0 to +5V
Analog Input Ranges
(V
AVDD
= +5V, V
DVDD
= +3V, V
AGND
= V
DGND
= 0V, V
REF
= V
REFMS
= +2.5V (external reference), C
REF
= C
REFMS
= 0.1μF, C
REF+
= C
REF
- = 0.1μF, C
REF+-to-REF-
= 2.2μF || 0.1μF, C
COM
= 2.2μF || 0.1μF, C
MSV
= 2.2μF || 0.1μF (unipolar devices), MSV = AGND
(bipolar devices), f
CLK
= 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C. See Figures 3 and 4.)
PARAMETER
REF Input Voltage Range
REF Input Resistance
REF Input Capacitance
REF
MS
Input Voltage Range
REF
MS
Input Resistance
REF
MS
Input Capacitance
REF+ Output Voltage
COM Output Voltage
REF- Output Voltage
Differential Reference
Voltage
Input-Voltage High
Input-Voltage Low
Input Hysteresis
Input Capacitance
Input Current
Input-Voltage High
Input-Voltage Low
C
IN
I
IN
V
IH
V
IL
V
IN
= 0V or V
DVDD
V
REF+
V
COM
V
REF-
V
REF+
-
V
REF
-
V
IH
V
IL
V
REF
= +2.5V
V
REF
= +2.5V
V
REF
= +2.5V
V
REF
= +2.5V
V
REFMS
R
REFMS
(Note 6)
2.0
SYMBOL
V
REF
R
REF
(Note 5)
CONDITIONS
MIN
2.0
TYP
2.5
5
15
2.5
5
15
3.850
2.600
1.350
2.500
3.0
MAX
3.0
UNITS
V
kΩ
pF
V
kΩ
pF
V
V
V
V
EXTERNAL REFERENCE (REF and REF
MS
are externally driven)
DIGITAL INPUTS (D0–D7,
RD, WR, CS,
CLK, SHDN,
CHSHDN,
CONVST)
0.7 x V
DVDD
0.3 x V
DVDD
20
15
0.02
0.7 x V
AVDD
0.3 x V
AVDD
I
SOURCE
= 0.8mA, Figure 1
I
SINK
= 1.6mA, Figure 1
RD
= high or
CS
= high
RD
= high or
CS
= high
0.06
15
V
DVDD
- 0.6
0.4
1
±1
V
V
mV
pF
µA
V
V
V
V
µA
pF
CLOCK-SELECT INPUT (INTCLK/EXTCLK)
DIGITAL OUTPUTS (D0–D11,
EOC, EOLC)
Output-Voltage High
Output-Voltage Low
D0–D11 Tri-State Leakage
Current
D0–D11 Tri-State Output
Capacitance
POWER SUPPLIES
Analog Supply Voltage
Digital Supply Voltage
AVDD
DVDD
MAX1304/MAX1305/MAX1306,
all channels selected
Analog Supply Current
I
AVDD
MAX1308/MAX1309/MAX1310,
all channels selected
MAX1312/MAX1313/MAX1314,
all channels selected
4.75
2.70
V
OH
V
OL
5.25
5.25
55
54
54
60
60
60
V
V
mA
www.maximintegrated.com
Maxim Integrated
│
4
MAX1304–MAX1306
MAX1308–MAX1310
MAX1312–MAX1314
Electrical Characteristics (continued)
8-/4-/2-Channel, 12-Bit, Simultaneous-
Sampling ADCs with ±10V, ±5V, and 0 to +5V
Analog Input Ranges
(V
AVDD
= +5V, V
DVDD
= +3V, V
AGND
= V
DGND
= 0V, V
REF
= V
REFMS
= +2.5V (external reference), C
REF
= C
REFMS
= 0.1μF, C
REF+
= C
REF
- = 0.1μF, C
REF+-to-REF-
= 2.2μF || 0.1μF, C
COM
= 2.2μF || 0.1μF, C
MSV
= 2.2μF || 0.1μF (unipolar devices), MSV = AGND
(bipolar devices), f
CLK
= 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C. See Figures 3 and 4.)
PARAMETER
SYMBOL
CONDITIONS
MAX1304/MAX1305/MAX1306,
all channels selected
Digital Supply Current
(C
LOAD
= 100pF) (Note 7)
I
DVDD
MAX1308/MAX1309/MAX1310,
all channels selected
MAX1312/MAX1313/MAX1314,
all channels selected
Shutdown Current
(Note 8)
Power-Supply Rejection Ratio
I
AVDD
I
DVDD
PSRR
SHDN = DVDD, V
CH
= open
SHDN = DVDD,
RD
=
WR
= high
V
AVDD
= +4.75V to +5.25V
Internal clock, Figure 7
Time to First Conversion Result
t
CONV
External clock, Figure 8
Internal clock, Figure 7
t
NEXT
t
ACQ
t
CS
t
RDL
t
RDH
t
WRL
t
CTW
t
WTC
t
CTR
t
RTC
t
ACC
t
REQ
t
EOCD
t
EOLCD
External clock, Figure 8
(Note 9) Figures 6–10
Figure 6
Figures 7, 8, 9
Figures 7, 8, 9
Figure 6
Figure 6
Figure 6
Figures 7, 8, 9
Figures 7, 8, 9
Figures 7, 8, 9
Figures 7, 8, 9
Figure 8
Figure 8
5
20
20
20
50
1
0.1
30
30
30
30
(Note 10)
(Note 10)
(Note 10)
(Note 10)
30
30
MIN
TYP
1.3
1.3
1.3
0.6
0.02
50
800
12
200
3
1000.0
225
900
MAX
2.6
2.6
2.6
10
1
µA
dB
ns
CLK
Cycles
ns
CLK
Cycles
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLK
Cycle
mA
UNITS
TIMING CHARACTERISTICS (Figure 1)
Time to Subsequent
Conversions
CONVST Pulse-Width Low
(Acquisition Time)
CS
Pulse Width
RD
Pulse-Width Low
RD
Pulse-Width High
WR
Pulse-Width Low
CS
to
WR
WR
to
CS
CS
to
RD
RD
to
CS
Data Access Time
(RD Low to Valid Data)
Bus Relinquish Time (RD High)
CLK Rise to
EOC
Delay
CLK Rise to
EOLC
Fall Delay
CONVST Fall to
EOLC
Rise
Delay
EOC
Pulse Width
t
CVEOLCD
Figures 7, 8, 9
Internal clock, Figure 7
t
EOC
External clock, Figure 8
www.maximintegrated.com
Maxim Integrated
│
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
