19-1003; Rev 4; 9/09
KIT
ATION
EVALU
BLE
AVAILA
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
General Description
Features
o
170Msps Conversion Rate
o
Low Noise Floor of -68dBFS
o
Excellent Low-Noise Characteristics
SNR = 65.8dB at f
IN
= 100MHz
SNR = 64.5dB at f
IN
= 250MHz
o
Excellent Dynamic Range
SFDR = 74dBc at f
IN
= 100MHz
SFDR = 72.9dBc at f
IN
= 250MHz
o
59.5dB NPR for f
NOTCH
= 28.8MHz and a Noise
Bandwidth of 50MHz
o
Single 1.8V Supply
o
788mW Power Dissipation at f
SAMPLE
= 170MHz
and f
IN
= 65MHz
o
On-Chip Track-and-Hold Amplifier
o
Internal 1.23V-Bandgap Reference
o
On-Chip Selectable Divide-by-2 Clock Input
o
LVDS Digital Outputs with Data Clock Output
o
MAX1213 EV Kit Available
MAX1213
The MAX1213 is a monolithic, 12-bit, 170Msps analog-
to-digital converter (ADC) optimized for outstanding
dynamic performance at high-IF frequencies up to
300MHz. The product operates with conversion rates
up to 170Msps while consuming only 788mW.
At 170Msps and an input frequency up to 250MHz, the
MAX1213 achieves a spurious-free dynamic range
(SFDR) of 72.9dBc. Its excellent signal-to-noise ratio
(SNR) of 66.2dB at 10MHz remains flat (within 2dB) for
input tones up to 250MHz. This ADC yields an excellent
low-noise floor of -68dBFS, which makes it ideal for
wideband applications such as cable head-end
receivers and power-amplifier predistortion in cellular
base-station transceivers.
The MAX1213 requires a single 1.8V supply. The analog
input is designed for either differential or single-ended
operation and can be AC- or DC-coupled. The ADC also
features a selectable on-chip divide-by-2 clock circuit,
which allows the user to apply clock frequencies as high
as 340MHz. This helps to reduce the phase noise of the
input clock source. A low-voltage differential signal
(LVDS) sampling clock is recommended for best perfor-
mance. The converter’s digital outputs are LVDS com-
patible and the data format can be selected to be either
two’s complement or offset binary.
The MAX1213 is available in a 68-pin QFN package
with exposed paddle (EP) and is specified over the
industrial (-40°C to +85°C) temperature range.
See the
Pin-Compatible Versions
table for a complete
selection of 8-bit, 10-bit, and 12-bit high-speed ADCs in
this family (with and without input buffers).
Ordering Information
PART
MAX1213EGK-D
MAX1213EGK+D
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
68 QFN-EP*
68 QFN-EP*
Applications
Base-Station Power-Amplifier Linearization
Cable Head-End Receivers
Wireless and Wired Broadband Communication
Communications Test Equipment
Radar and Satellite Subsystems
-Denotes
a package containing lead(Pb).
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed paddle.
D = Dry pack.
Pin-Compatible Versions
PART
MAX1121
MAX1122
MAX1123
MAX1124
MAX1213
MAX1214
MAX1215
MAX1213N
MAX1214N
MAX1215N
RESOLUTION
(BITS)
8
10
10
10
12
12
12
12
12
12
SPEED GRADE
(Msps)
250
170
210
250
170
210
250
170
210
250
ON-CHIP
BUFFER
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
Pin Configuration appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
MAX1213
ABSOLUTE MAXIMUM RATINGS
AV
CC
to AGND ..................................................... -0.3V to +2.1V
OV
CC
to OGND .................................................... -0.3V to +2.1V
AV
CC
to OV
CC
...................................................... -0.3V to +2.1V
AGND to OGND ................................................... -0.3V to +0.3V
INP, INN to AGND ....................................-0.3V to (AV
CC
+ 0.3V)
REFIO, REFADJ to AGND ........................-0.3V to (AV
CC
+ 0.3V)
All Digital Inputs to AGND........................-0.3V to (AV
CC
+ 0.3V)
All Digital Outputs to OGND ....................-0.3V to (OV
CC
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C, multilayer board)
68-Pin QFN-EP (derate 41.7mW/°C
above +70°C)........................................................3333mW/°C
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-60°C to +150°C
Maximum Current into Any Pin .........................................±50mA
Lead Temperature (soldering,10s) ..................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1μF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω
±1%,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
DC ACCURACY
Resolution
Integral Nonlinearity
(Note 2)
Differential Nonlinearity (Note 2)
Transfer Curve Offset
Offset Temperature Drift
ANALOG INPUTS (INP, INN)
Full-Scale Input Voltage Range
Full-Scale Range Temperature
Drift
Common-Mode Input Range
Input Capacitance
Differential Input Resistance
Full-Power Analog Bandwidth
REFERENCE (REFIO, REFADJ)
Reference Output Voltage
Reference Temperature Drift
REFADJ Input High Voltage
SAMPLING CHARACTERISTICS
Maximum Sampling Rate
Minimum Sampling Rate
Clock Duty Cycle
Aperture Delay
Aperture Jitter
t
AD
t
AJ
f
SAMPLE
f
SAMPLE
Set by clock-management circuit
Figures 4, 11
Figure 11
170
20
40 to 60
620
0.2
MHz
MHz
%
ps
ps
RMS
V
REFADJ
Used to disable the internal reference
AV
CC
- 0.1
V
REFIO
T
A
= +25°C, REFADJ = AGND
1.18
1.23
90
1.30
V
ppm/°C
V
V
CM
C
IN
R
IN
FPBW
3.00
Internally self-biased
V
FS
T
A
= +25°C (Note 2)
1320
1454
130
1.365 ±0.15
2.5
4.2
700
6.25
1590
mV
P-P
ppm/°C
V
pF
kΩ
MHz
INL
DNL
V
OS
f
IN
= 10MHz, T
A
= +25°C
T
A
= +25°C, No missing codes
T
A
= +25°C (Note 2)
12
-2
-0.8
-3.3
40
±0.75
±0.3
+2
+0.8
+3.3
Bits
LSB
LSB
mV
μV/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1μF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω
±1%,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
CLOCK INPUTS (CLKP, CLKN)
Differential Clock Input Amplitude
Clock Input Common-Mode
Voltage Range
Clock Differential Input
Resistance
Clock Differential Input
Capacitance
R
CLK
C
CLK
(Note 3)
Internally self-biased
200
500
1.15 ±0.25
11
±25%
5
mV
P-P
V
kΩ
pF
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX1213
DYNAMIC CHARACTERISTICS (at -1dBFS)
f
IN
= 10MHz, T
A
≥
+25°C
Signal-to-Noise
Ratio
SNR
f
IN
= 100MHz, T
A
≥
+25°C
f
IN
= 200MHz
f
IN
= 250MHz
f
IN
= 10MHz, T
A
≥
+25°C
Signal-to-Noise
and Distortion
SINAD
f
IN
= 100MHz, T
A
≥
+25°C
f
IN
= 200MHz
f
IN
= 250MHz
f
IN
= 10MHz, T
A
≥
+25°C
Spurious-Free
Dynamic Range
SFDR
f
IN
= 100MHz, T
A
≥
+25°C
f
IN
= 200MHz
f
IN
= 250MHz
f
IN
= 10MHz, T
A
≥
+25°C
Worst Harmonics
(HD2 or HD3)
f
IN
= 100MHz, T
A
≥
+25°C
f
IN
= 200MHz
f
IN
= 250MHz
Two-Tone Intermodulation
Distortion
Noise Power Ratio
TTIMD
NPR
f
IN1
= 99MHz at -7dBFS,
f
IN2
= 101MHz at -7dBFS
f
NOTCH
= 28.8MHz
±1MHz,
noise BW = 50MHz, A
IN
= -9.1dBFS
R
L
= 100Ω
±1%
R
L
= 100Ω
±1%
250
1.125
73
69
64.0
63.5
64.5
64.5
66.2
65.8
65
64.5
65.9
65.2
63.9
63.5
83.0
74.0
70.7
72.9
-85
-74
-70.7
-72.9
-78
59.5
dBc
dB
-73
-69.0
dBc
dBc
dB
dB
LVDS DIGITAL OUTPUTS (D0P/N–D11P/N, ORP/N)
Differential Output Voltage
Output Offset Voltage
|V
OD
|
OV
OS
400
1.310
mV
V
_______________________________________________________________________________________
3
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
MAX1213
ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1μF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω
±1%,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
Digital Input Voltage Low
Digital Input Voltage High
TIMING CHARACTERISTICS
CLK-to-Data Propagation Delay
CLK-to-DCLK Propagation Delay
DCLK-to-Data Propagation Delay
LVDS Output Rise Time
LVDS Output Fall Time
Output Data Pipeline Delay
POWER REQUIREMENTS
Analog Supply Voltage Range
Digital Supply Voltage Range
Analog Supply Current
Digital Supply Current
Analog Power Dissipation
Power-Supply Rejection Ratio
(Note 4)
AV
CC
OV
CC
I
AVCC
I
OVCC
P
DISS
PSRR
f
IN
= 65MHz
f
IN
= 65MHz
f
IN
= 65MHz
Offset
Gain
1.70
1.70
1.80
1.80
375
63
788
1.8
1.5
1.90
1.90
425
75
900
V
V
mA
mA
mW
mV/V
%FS/V
t
PDL
t
CPDL
t
RISE
t
FALL
t
LATENCY
Figure 4
Figure 4
2.8
20% to 80%, C
L
= 5pF
20% to 80%, C
L
= 5pF
Figure 4
1.75
4.95
3.2
460
460
11
3.6
ns
ns
ns
ps
ps
Clock
cycles
SYMBOL
V
IL
V
IH
0.8 x AV
CC
CONDITIONS
MIN
TYP
MAX
0.2 x AV
CC
UNITS
V
V
LVCMOS DIGITAL INPUTS (CLKDIV,
T/B)
t
PDL
- t
CPDL
Figure 4 (Note 3)
Note 1:
≥
+25°C guaranteed by production test, < +25°C guaranteed by design and characterization.
Note 2:
Static linearity and offset parameters are computed from a best-fit straight line through the code transition points. The full-
scale range (FSR) is defined as 4095 x slope of the line.
Note 3:
Parameter guaranteed by design and characterization: T
A
= T
MIN
to T
MAX
.
Note 4:
PSRR is measured with both analog and digital supplies connected to the same potential.
4
_______________________________________________________________________________________
1.8V, 12-Bit, 170Msps ADC for
Broadband Applications
Typical Operating Characteristics
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, A
IN
= -1dBFS; see each TOC for detailed information on test condi-
tions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential R
L
= 100Ω, T
A
= +25°C.)
FFT PLOT
(8192-POINT DATA RECORD)
MAX1213 toc01
MAX1213
FFT PLOT
(8192-POINT DATA RECORD)
MAX1213 toc02
FFT PLOT
(8192-POINT DATA RECORD)
-10
-20
AMPLITUDE (dBFS)
-30
-40
-50
-60
-70
-80
-90
-100
-110
f
SAMPLE
= 170MHz
f
IN
= 200.11108MHz
A
IN
= -1.025dBFS
SNR = 65dB
SINAD = 63.9dB
SFDR = 70.7dBc
HD2 = -74.8dBc
HD3 = -70.7dBc
HD2
HD3
MAX1213 toc03
MAX1213 toc09
MAX1213 toc06
0
-10
-20
AMPLITUDE (dBFS)
-30
-40
-50
-60
-70
-80
-90
-100
-110
0
10
HD2 HD3
AMPLITUDE (dBFS)
f
SAMPLE
= 170MHz
f
IN
= 12.47192MHz
A
IN
= -1.001dBFS
SNR = 66.7dB
SINAD = 66.4dB
SFDR = 83.8dBc
HD2 = -83.8dBc
HD3 = -84dBc
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
f
SAMPLE
= 170MHz
f
IN
= 65.09888MHz
A
IN
= -1.099dBFS
SNR = 66.5dB
SINAD = 65.7dB
SFDR = 76dBc
HD2 = -77.7dBc
HD3 = -76dBc
HD3
0
HD2
40 50 60 70 80
ANALOG INPUT FREQUENCY (MHz)
20
30
0
10
40 50 60 70 80
ANALOG INPUT FREQUENCY (MHz)
20
30
0
10
20 30 40 50 60 70 80
ANALOG INPUT FREQUENCY (MHz)
FFT PLOT
(8192-POINT DATA RECORD)
MAX1213 toc04
TWO-TONE IMD PLOT
(8192-POINT DATA RECORD)
-10
-20
AMPLITUDE (dBFS)
-30
-40
-50
-60
-70
-80
-90
-100
-110
f
IN1
- f
IN2
f
IN1
+ f
IN2
3f
IN2
- 2f
IN1
2f
IN1
- f
IN2
f
SAMPLE
= 170MHz
f
IN1
= 99.25659MHz
f
IN2
= 101.08276MHz
A
IN1
= A
IN2
= -6.974dBFS
IMD = -78dBc
MAX1213 toc05
SNR/SINAD vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 170MHz, A
IN
= -1dBFS)
70
0
-10
-20
AMPLITUDE (dBFS)
-30
-40
-50
-60
-70
-80
-90
-100
-110
0
SNR/SINAD (dB)
f
SAMPLE
= 170MHz
f
IN
= 250.04038MHz
A
IN
= -1.040dBFS
SNR = 64.5dB
SINAD = 63.5dB
SFDR = 72.9dBc
HD2 = -77.4dBc
HD3 = -72.9dBc
HD2
0
f
IN2
f
IN1
65
SNR
60
SINAD
HD3
55
50
45
0
10
40 50 60 70 80
ANALOG INPUT FREQUENCY (MHz)
20
30
0
50
100
150
200
250
300
ANALOG INPUT FREQUENCY (MHz)
10
40 50 60 70 80
ANALOG INPUT FREQUENCY (MHz)
20
30
SFDR vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 170MHz, A
IN
= -1dBFS)
MAX1213 toc07
HD2/HD3 vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 170MHz, A
IN
= -1dBFS)
MAX1213 toc08
SNR/SINAD vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 170MHz, f
IN
= 65.098877MHz)
70
SNR
60
SNR/SINAD (dB)
50
SINAD
40
30
20
10
90
85
80
75
SFDR (dBc)
70
65
60
55
50
45
0
50
100
150
200
250
-60
-65
-70
-75
HD2/HD3 (dBc)
-80
-85
-90
-95
-100
-105
-110
HD2
HD3
300
0
50
100
150
200
250
300
-55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5
ANALOG INPUT AMPLITUDE (dBFS)
0
ANALOG INPUT FREQUENCY (MHz)
ANALOG INPUT FREQUENCY (MHz)
_______________________________________________________________________________________
5
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