19-2334; Rev 6; 3/10
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial 10-Bit ADCs
General Description
The MAX1136–MAX1139 low-power, 10-bit, multichannel
analog-to-digital converters (ADCs) feature internal
track/hold (T/H), voltage reference, clock, and an
I
2
C-compatible 2-wire serial interface. These devices
operate from a single supply of 2.7V to 3.6V (MAX1137/
MAX1139) or 4.5V to 5.5V (MAX1136/MAX1138) and
require only 670µA at the maximum sampling rate of
94.4ksps. Supply current falls below 230µA for sampling
rates under 46ksps. AutoShutdown™ powers down the
devices between conversions, reducing supply current to
less than 1µA at low throughput rates. The
MAX1136/MAX1137 have four analog input channels
each, while the MAX1138/MAX1139 have 12 analog input
channels each. The fully differential analog inputs are
software configurable for unipolar or bipolar, and single
ended or differential operation.
The full-scale analog input range is determined by the
internal reference or by an externally applied reference
voltage ranging from 1V to V
DD
. The MAX1137/
MAX1139 feature a 2.048V internal reference and the
MAX1136/MAX1138 feature a 4.096V internal reference.
The MAX1136/MAX1137 are available in an 8-pin µMAX
®
package. The MAX1138/MAX1139 are available in a
16-pin QSOP package. The MAX1136–MAX1139 are
guaranteed over the extended temperature range
(-40°C to +85°C). For pin-compatible 12-bit parts, refer to
the MAX1236–MAX1239 data sheet. For pin-compatible
8-bit parts, refer to the MAX1036–MAX1039 data sheet.
Features
o
High-Speed I
2
C-Compatible Serial Interface
400kHz Fast Mode
1.7MHz High-Speed Mode
o
Single-Supply
2.7V to 3.6V (MAX1137/MAX1139)
4.5V to 5.5V (MAX1136/MAX1138)
o
Internal Reference
2.048V (MAX1137/MAX1139)
4.096V (MAX1136/MAX1138)
o
External Reference: 1V to V
DD
o
Internal Clock
o
4-Channel Single-Ended or 2-Channel Fully
Differential (MAX1136/MAX1137)
o
12-Channel Single-Ended or 6-Channel Fully
Differential (MAX1138/MAX1139)
o
Internal FIFO with Channel-Scan Mode
o
Low Power
670µA at 94.4ksps
230µA at 40ksps
60µA at 10ksps
6µA at 1ksps
0.5µA in Power-Down Mode
o
Software-Configurable Unipolar/Bipolar
o
Small Packages
8-Pin
µMAX
(MAX1136/MAX1137)
16-Pin QSOP (MAX1138/MAX1139)
MAX1136–MAX1139
Applications
Hand-Held Portable
Applications
Medical Instruments
Battery-Powered Test
Equipment
Solar-Powered Remote
Systems
Received-Signal-Strength
Indicators
System Supervision
Ordering Information
PART
MAX1136EUA+
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-
I
2
C SLAVE
PACKAGE ADDRESS
8 µMAX
8 µMAX
16 QSOP
16 QSOP
0110100
0110100
0110101
0110101
Selector Guide
PART
MAX1136
MAX1137
MAX1138
MAX1139
INTERNAL
SUPPLY
INPUT
REFERENCE VOLTAGE
CHANNELS
(V)
(V)
4
4
12
12
4.096
2.048
4.096
2.048
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
INL
(LSB)
±1
±1
±1
±1
MAX1137EUA+
MAX1138EEE+
MAX1139EEE+
+Denotes
a lead(Pb)-free/RoHS-compliant package.
AutoShutdown is a trademark of Maxim Integrated Products, Inc.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
Pin Configurations and Typical Operating Circuit appear at
end of data sheet.
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial 10-Bit ADCs
MAX1136–MAX1139
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND ..............................................................-0.3V to +6V
AIN0–AIN11,
REF to GND ............-0.3V to the lower of (V
DD
+ 0.3V) and 6V
SDA, SCL to GND.....................................................-0.3V to +6V
Maximum Current Into Any Pin .........................................±50mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin µMAX (derate 5.9mW/°C above +70°C) ..........470.6mW
16-Pin QSOP (derate 8.3mW/°C above +70°C)........666.7mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= 2.7V to 3.6V (MAX1137/MAX1139), V
DD
= 4.5V to 5.5V (MAX1136/MAX1138), V
REF
= 2.048V (MAX1137/MAX1139), V
REF
=
4.096V (MAX1136/MAX1138), f
SCL
= 1.7MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C. See
Tables 1–5 for programming notation.)
PARAMETER
DC ACCURACY (Note 1)
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Offset-Error Temperature
Coefficient
Gain Error
Gain-Temperature Coefficient
Channel-to-Channel Offset
Matching
Channel-to-Channel Gain
Matching
DYNAMIC PERFORMANCE (f
IN(SINE-WAVE)
= 10kHz, V
IN(P-P)
= V
REF
, f
SAMPLE
= 94.4ksps)
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious Free Dynamic Range
Full-Power Bandwidth
Full-Linear Bandwidth
CONVERSION RATE
Conversion Time (Note 4)
t
CONV
Internal clock
External clock
Internal clock, SCAN[1:0] = 01
Throughput Rate
f
SAMPLE
Internal clock, SCAN[1:0] = 00
CS[3:0] = 1011 (MAX1138/MAX1139)
External clock
Track/Hold Acquisition Time
800
10.6
53
53
94.4
ns
ksps
6.8
µs
SINAD
THD
SFDR
SINAD > 57dB
-3dB point
Up to the 5th harmonic
60
-70
70
3.0
5.0
dB
dB
dB
MHz
MHz
Relative to FSR
(Note 3)
Relative to FSR
0.3
±0.1
±0.1
0.3
±1
INL
DNL
(Note 2)
No missing codes over temperature
10
±1
±1
±1
Bits
LSB
LSB
LSB
ppm/°C
LSB
ppm/°C
LSB
LSB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial 10-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 2.7V to 3.6V (MAX1137/MAX1139), V
DD
= 4.5V to 5.5V (MAX1136/MAX1138), V
REF
= 2.048V (MAX1137/MAX1139), V
REF
=
4.096V (MAX1136/MAX1138), f
SCL
= 1.7MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C. See
Tables 1–5 for programming notation.)
PARAMETER
Internal Clock Frequency
Aperture Delay (Note 5)
ANALOG INPUT (AIN0–AIN11)
Input-Voltage Range, Single-
Ended and Differential (Note 6)
Input Multiplexer Leakage Current
Input Capacitance
INTERNAL REFERENCE (Note 7)
Reference Voltage
Reference-Voltage Temperature
Coefficient
REF Short-Circuit Current
REF Source Impedance
EXTERNAL REFERENCE
REF Input-Voltage Range
REF Input Current
Input High Voltage
Input Low Voltage
Input Hysteresis
Input Current
Input Capacitance
Output Low Voltage
POWER REQUIREMENTS
Supply Voltage
V
DD
MAX1137/MAX1139
MAX1136/MAX1138
f
SAMPLE
= 94.4ksps
external clock
f
SAMPLE
= 40ksps
internal clock
Supply Current
I
DD
f
SAMPLE
= 10ksps
internal clock
f
SAMPLE
=1ksps
internal clock
Internal reference
External reference
Internal reference
External reference
Internal reference
External reference
Internal reference
External reference
2.7
4.5
900
670
530
230
380
60
330
6
0.5
10
µA
3.6
5.5
1150
900
V
VREF
IREF
V
IH
V
IL
V
HYST
I
IN
C
IN
V
OL
I
SINK
= 3mA
V
IN
0 to V
DD
15
0.4
0.1
✕
V
DD
±10
(Note 8)
f
SAMPLE
= 94.4ksps
0.7
✕
V
DD
0.3
✕
V
DD
1
VDD
40
V
µA
V
V
V
µA
pF
V
1.5
VREF
TCVREF
T
A
= +25°C
MAX1137/MAX1139
MAX1136/MAX1138
1.968
3.939
2.048
4.096
25
2
2.128
4.256
V
ppm/°C
mA
kΩ
CIN
Unipolar
Bipolar
ON/OFF leakage current, VAIN_ = 0 or VDD
0
0
±0.01
22
V
REF
±V
REF
/2
±1
V
µA
pF
t
AD
External clock, fast mode
External clock, high-speed mode
SYMBOL
CONDITIONS
MIN
TYP
2.8
60
30
MAX
UNITS
MHz
ns
MAX1136–MAX1139
DIGITAL INPUTS/OUTPUTS (SCL, SDA)
Shutdown (internal reference OFF)
_______________________________________________________________________________________
3
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial 10-Bit ADCs
MAX1136–MAX1139
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 2.7V to 3.6V (MAX1137/MAX1139), V
DD
= 4.5V to 5.5V (MAX1136/MAX1138), V
REF
= 2.048V (MAX1137/MAX1139), V
REF
=
4.096V (MAX1136/MAX1138), f
SCL
= 1.7MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C. See
Tables 1–5 for programming notation.)
PARAMETER
POWER REQUIREMENTS
Power-Supply Rejection Ratio
PSRR
Full-scale input (Note 9)
±0.01
±0.5
LSB/V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS (Figure 1)
(V
DD
= 2.7V to 3.6V (MAX1137/MAX1139), V
DD
= 4.5V to 5.5V (MAX1136/MAX1138), V
REF
= 2.048V (MAX1137/MAX1139), V
REF
=
4.096V (MAX1136/MAX1138), f
SCL
= 1.7MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C. See
Tables 1–5 for programming notation.)
PARAMETER
Serial Clock Frequency
Bus Free Time Between a
STOP (P) and a
START (S) Condition
Hold Time for START (S) Condition
Low Period of the SCL Clock
High Period of the SCL Clock
Setup Time for a Repeated START
Condition (Sr)
Data Hold Time
Data Setup Time
Rise Time of Both SDA and SCL
Signals, Receiving
Fall Time of SDA Transmitting
Setup Time for STOP (P) Condition
Capacitive Load for Each Bus Line
Pulse Width of Spike Suppressed
Serial Clock Frequency
Hold Time, Repeated START
Condition (Sr)
Low Period of the SCL Clock
High Period of the SCL Clock
Setup Time for a Repeated START
Condition (Sr)
Data Hold Time
Data Setup Time
SYMBOL
f
SCL
t
BUF
t
HD, STA
t
LOW
t
HIGH
t
SU, STA
t
HD, DAT
t
SU, DAT
t
R
t
F
t
SU, STO
C
B
t
SP
f
SCLH
t
HD, STA
t
LOW
t
HIGH
t
SU
,
STA
t
HD
,
DAT
t
SU
,
DAT
(Note 10)
(Note 13)
160
320
120
160
0
10
150
Measured from 0.3V
DD
to 0.7V
DD
Measured from 0.3V
DD
to 0.7V
DD
(Note 11)
(Note 10)
1.3
0.6
1.3
0.6
0.6
0
100
20 + 0.1C
B
20 + 0.1C
B
0.6
400
50
1.7
300
300
900
CONDITIONS
MIN
TYP
MAX
400
UNITS
kHz
µs
µs
µs
µs
µs
ns
ns
ns
ns
µs
pF
ns
MHz
ns
ns
ns
ns
ns
ns
TIMING CHARACTERISTICS FOR FAST MODE
TIMING CHARACTERISTICS FOR HIGH-SPEED MODE (C
B
= 400pF, Note 12)
4
_______________________________________________________________________________________
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial 10-Bit ADCs
TIMING CHARACTERISTICS (Figure 1) (continued)
(V
DD
= 2.7V to 3.6V (MAX1137/MAX1139), V
DD
= 4.5V to 5.5V (MAX1136/MAX1138), V
REF
= 2.048V (MAX1137/MAX1139), V
REF
=
4.096V (MAX1136/MAX1138), f
SCL
= 1.7MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C. See
Tables 1–5 for programming notation.).)
PARAMETER
Rise Time of SCL Signal
(Current Source Enabled)
Rise Time of SCL Signal after
Acknowledge Bit
Fall Time of SCL Signal
Rise Time of SDA Signal
Fall Time of SDA Signal
Setup Time for STOP (P) Condition
Capacitive Load for Each Bus Line
Pulse Width of Spike Suppressed
SYMBOL
t
RCL
t
RCL1
t
FCL
t
RDA
t
FDA
t
SU
,
STO
C
B
t
SP
(Notes 10 and 13)
0
CONDITIONS
Measured from 0.3V
DD
to 0.7V
DD
Measured from 0.3V
DD
to 0.7V
DD
Measured from 0.3V
DD
to 0.7V
DD
Measured from 0.3V
DD
to 0.7V
DD
Measured from 0.3V
DD
to 0.7V
DD
(Note 11)
MIN
20
20
20
20
20
160
400
10
TYP
MAX
80
160
80
160
160
UNITS
ns
ns
ns
ns
ns
ns
pF
ns
MAX1136–MAX1139
Note 1:
For DC accuracy, the MAX1136/MAX1138 are tested at V
DD
= 5V and the MAX1137/MAX1139 are tested at V
DD
= 3V. All
devices are configured for unipolar, single-ended inputs.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and
offsets have been calibrated.
Note 3:
Offset nulled.
Note 4:
Conversion time is defined as the number of clock cycles needed for conversion multiplied by the clock period. Conversion
time does not include acquisition time. SCL is the conversion clock in the external clock mode.
Note 5:
A filter on the SDA and SCL inputs suppresses noise spikes and delays the sampling instant.
Note 6:
The absolute input-voltage range for the analog inputs (AIN0–AIN11) is from GND to V
DD
.
Note 7:
When the internal reference is configured to be available at AIN_/REF (SEL[2:1] = 11) decouple AIN_/REF to GND with a
0.1µF capacitor and a 2kΩ series resistor (see the
Typical Operating Circuit).
Note 8:
ADC performance is limited by the converter’s noise floor, typically 300µV
P-P
.
Note 9:
Measured as for the MAX1137/MAX1139
⎡
2
N
−
1
⎤
⎢
[
V
FS
(3.6V)
−
V
FS
(2.7V)
]
×
⎥
V
REF
⎦
⎣
(3.6V
−
2.7V)
and for the MAX1136/MAX1138
⎡
2
N
−
1
⎤
V
FS
(5.5V)
−
V
FS
(4.5V)
]
×
⎢
[
⎥
V
REF
⎦
⎣
(5.5V
−
4.5V)
Note 10:
A master device must provide a data hold time for SDA (referred to V
IL
of SCL) in order to bridge the undefined region of
SCL’s falling edge (see Figure 1).
Note 11:
The minimum value is specified at +25°C.
Note 12:
C
B
= total capacitance of one bus line in pF.
Note 13:
f
SCL
must meet the minimum clock low time plus the rise/fall times.
_______________________________________________________________________________________
5
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