M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
REJ03B0134-0100Z
Rev.1.00
Oct 01, 2002
1. DESCRIPTION
The M37221M4H/M6H/M8H/MAH-XXXSP/FP are single-chip micro-
computers designed with CMOS silicon gate technology. They have
a OSD, I
2
C-BUS interface, and PWM, making them perfect for TV
channel selection system.
The M37221EASP/FP have a built-in PROM that can be written elec-
trically.
●OSD
function
Display characters .................................... 24 characters 5 2 lines
(3 lines or more can be displayed by software)
Kinds of characters ........................................................ 256 kinds
Character display area .............................................. 12
✕
16 dots
Kinds of character sizes ..................................................... 3 kinds
Kinds of character colors .................................. 8 colors (R, G, B)
Coloring unit ................... character, character background, raster
Display position .............................................................................
Horizontal: 64 levels
Vertical: 128 levels
Attribute .............................................................................. border
2. FEATURES
●
Number
of basic instructions ..................................................... 71
●
Memory size
ROM ............. 16K bytes (M37221M4H-XXXSP/FP)
24K bytes (M37221M6H-XXXSP/FP)
32K bytes (M37221M8H-XXXSP/FP)
40K bytes (M37221MAH-XXXSP/FP, M37221EASP/FP)
RAM ............. 384 bytes (M37221M4H-XXXSP/FP)
448 bytes (M37221M6H-XXXSP/FP)
576 bytes (M37221M8H-XXXSP/FP)
704 bytes (M37221MAH-XXXSP/FP, M37221EASP/FP)
(ROM correction memory included)
●
The minimum instruction execution time
......................................... 0.5
µs
(at 8 MHz oscillation frequency)
●
Power source voltage .................................................. 5 V ± 10 %
●
Subroutine nesting
maximum 96 levels (M37221M4H/M6H-XXXSP/FP)
maximum 128 levels (M37221M8H/MAH-XXXSP/FP, M37221EASP/FP)
●
Interrupts ........................................................ 14 types, 14 vectors
●
8-bit timers ................................................................................... 4
●
Programmable I/O ports
(Ports P0, P1, P2, P3
0
–P3
2
) ..................................................... 27
●
Input ports (Ports P3
3
, P3
4
) ......................................................... 2
●
Output ports (Ports P5
2
–P5
5
) ...................................................... 4
●
LED drive ports ............................................................................ 4
●
Serial I/O ............................................................. 8-bit
✕
1 channel
●
Multi-master I
2
C-BUS interface ............................... 1 (2 systems)
●
A-D comparator (6-bit resolution) ................................. 6 channels
●
D-A converter (6-bit resolution) .................................................... 2
Note:
Only M37221EASP/FP has D-A converter.
output circuit .......................................... 14-bit
✕
1, 8-bit
✕
6
●
Power dissipation .............................. High-speed mode : 165 mW
(at V
CC
=5.5V, 8 MHz oscillation frequency, and OSD on)
●
ROM correction function ................................................. 2 vectors
●
PWM
3. APPLICATION
TV
Rev.1.00 Oct 01, 2002
REJ03B0134-0100Z
page 1 of 110
M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
TABLE OF CONTENTS
1. DESCRIPTION ............................................................... 1
2. FEATURES .................................................................... 1
3. APPLICATION ................................................................ 1
4. PIN CONFIGURATION .................................................. 3
5. FUNCTIONAL BLOCK DIAGRAM ................................. 5
6. PERFORMANCE OVERVIEW ....................................... 6
7. PIN DESCRIPTION ........................................................ 8
8. FUNCTIONAL DESCRIPTION ..................................... 12
8.1 CENTRAL PROCESSING UNIT (CPU) ......... 12
8.2 MEMORY ....................................................... 13
8.3 INTERRUPTS ................................................ 19
8.4 TIMERS .......................................................... 24
8.5 SERIAL I/O ..................................................... 27
8.6 MULTI-MASTER I
2
C-BUS INTERFACE ........ 31
8.7 PWM OUTPUT FUNCTION ........................... 44
8.8 A-D COMPARATOR ....................................... 49
8.9 D-A CONVERTER .......................................... 51
8.10 ROM CORRECTION FUNCTION ................ 53
8.11 OSD FUNCTIONS ........................................ 54
8.11.1 Display Position .............................. 58
8.11.2 Character Size ................................ 62
8.11.3 Clock for OSD ................................. 64
8.11.4 Memory for OSD ............................. 65
8.11.5 Color Register ................................. 68
8.11.6 Border ............................................. 70
8.11.7 Multiline Display .............................. 71
8.11.8 OSD Output Pin Control ................. 72
8.11.9 Raster Coloring Function ................ 73
8.12 SOFTWARE RUNAWAY DETECT FUNCTION ... 74
8.13 RESET CIRCUIT .......................................... 75
8.14 CLOCK GENERATING CIRCUIT ................. 76
8.15 DISPLAY OSCILLATION CIRCUIT .............. 77
8.16 AUTO-CLEAR CIRCUIT ............................... 77
8.17 ADDRESSING MODE .................................. 77
8.18 MACHINE INSTRUCTIONS ......................... 77
9. PROGRAMMING NOTES ............................................ 77
10. ABSOLUTE MAXIMUM RATINGS ............................. 78
11. RECOMMENDED OPERATING CONDITIONS ......... 78
12. ELECTRIC CHARACTERISTICS .............................. 79
13. A-D COMPARISON CHARACTERISTICS ................. 81
14. D-A CONVERSION CHARACTERISTICS ................. 81
15. MULTI-MASTER I
2
C-BUS BUS LINE CHARACTERISTICS .... 81
16. PROM PROGRAMMING METHOD ........................... 82
17. DATA REQUIRED FOR MASK ORDERS .................. 83
18. ONE TIME PROM VERSION M37221EASP/FP MARKING ..... 84
19. APPENDIX ................................................................. 85
20. PACKAGE OUTLINE ................................................ 110
Rev.1.00 Oct 01, 2002
REJ03B0134-0100Z
page 2 of 110
M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
4. PIN CONFIGURATION
H
SYNC
V
SYNC
P0
0
/PWM0
P0
1
/PWM1
P0
2
/PWM2
P0
3
/PWM3
P0
4
/PWM4
P0
5
/PWM5
P0
6
/INT2/A-D4
P0
7
/INT1
P2
3
/TIM3
P2
4
/TIM2
P2
5
P2
6
P2
7
D-A
P3
2
CNV
SS
X
IN
X
OUT
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P5
2
/R
P5
3
/G
P5
4
/B
P5
5
/OUT1
P2
0
/S
CLK
P2
1
/S
OUT
P2
2
/S
IN
P1
0
/OUT2
P1
1
/SCL1
P1
2
/SCL2
P1
3
/SDA1
P1
4
/SDA2
P1
5
/A-D1/INT3
P1
6
/A-D2
P1
7
/A-D3
P3
0
/A-D5
P3
1
/A-D6
RESET
OSC1/P3
3
OSC2/P3
4
V
CC
Outline 42P4B
Fig. 4.1 Pin Configuration (1) (Top View)
M37221M4H/M6H/M8H/MAH-XXXSP
P5
0
/H
SYNC
P5
1
/V
SYNC
P0
0
/PWM0
P0
1
/PWM1
P0
2
/PWM2
P0
3
/PWM3
P0
4
/PWM4
P0
5
/PWM5
1
2
3
4
42
41
40
39
P5
2
/R
P5
3
/G
P5
4
/B
P5
5
/OUT1
P2
0
/S
CLK
P2
1
/S
OUT
P2
2
/S
IN
P1
0
/OUT2
P1
1
/SCL1
M37221M4H/M6H/M8H/MAH-XXXFP
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
P0
6
/INT2/A-D4
P0
7
/INT1
P2
3
/TIM3
P2
4
/TIM2
P2
5
P2
6
P2
7
D-A
P3
2
CNV
SS
X
IN
X
OUT
V
SS
P1
2
/SCL2
P1
3
/SDA1
P1
4
/SDA2
P1
5
/A-D1/INT3
P1
6
/A-D2
P1
7
/A-D3
P3
0
/A-D5
P3
1
/A-D6
RESET
OSC1/P3
3
OSC2/P3
4
V
CC
23
22
Outline 42P2R-A/E
Fig. 4.2 Pin Configuration (2) (Top View)
Rev.1.00 Oct 01, 2002
REJ03B0134-0100Z
page 3 of 110
M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
H
SYNC
V
SYNC
P0
0
/PWM0
P0
1
/PWM1
P0
2
/PWM2
P0
3
/PWM3
P0
4
/PWM4
P0
5
/PWM5
P0
6
/INT2/A-D4
P0
7
/INT1
P2
3
/TIM3
P2
4
/TIM2
P2
5
P2
6
P2
7
D-A
P3
2
CNV
SS
X
IN
X
OUT
V
SS
1
2
3
4
5
6
7
8
42
41
40
39
38
37
36
35
P5
2
/R
P5
3
/G
P5
4
/B
P5
5
/OUT1
P2
0
/S
CLK
P2
1
/S
OUT
P2
2
/S
IN
P1
0
/OUT2
P1
1
/SCL1
P1
2
/SCL2
P1
3
/SDA1
P1
4
/SDA2
P1
5
/A-D1/INT3
P1
6
/A-D2
P1
7
/A-D3
P3
0
/A-D5/DA1
P3
1
/A-D6/DA2
RESET
OSC1/P3
3
OSC2/P3
4
V
CC
M37221EASP
9
10
11
12
13
14
15
16
17
18
19
20
21
34
33
32
31
30
29
28
27
26
25
24
23
22
Outline 42P4B
Fig. 4.3 Pin Configuration (3) (Top View)
P5
0
/H
SYNC
P5
1
/V
SYNC
P0
0
/PWM0
P0
1
/PWM1
P0
2
/PWM2
P0
3
/PWM3
P0
4
/PWM4
P0
5
/PWM5
P0
6
/INT2/A-D4
P0
7
/INT1
P2
3
/TIM3
P2
4
/TIM2
P2
5
P2
6
P2
7
D-A
P3
2
CNV
SS
X
IN
X
OUT
V
SS
1
2
3
4
5
6
7
8
42
41
40
39
38
37
36
35
P5
2
/R
P5
3
/G
P5
4
/B
P5
5
/OUT1
P2
0
/S
CLK
P2
1
/S
OUT
P2
2
/S
IN
P1
0
/OUT2
P1
1
/SCL1
P1
2
/SCL2
P1
3
/SDA1
P1
4
/SDA2
P1
5
/A-D1/INT3
M37221EAFP
9
10
11
12
13
14
15
16
17
18
19
20
21
34
33
32
31
30
29
28
27
26
25
24
23
22
P1
6
/A-D2
P1
7
/A-D3
P3
0
/A-D5/DA1
P3
1
/A-D6/DA2
RESET
OSC1/P3
3
OSC2/P3
4
V
CC
Outline 42P2R-A/E
Fig. 4.4 Pin Configuration (4) (Top View)
Rev.1.00 Oct 01, 2002
REJ03B0134-0100Z
page 4 of 110
Clock input Clock output
X
IN
X
OUT
(
φ
) Timing output
V
CC
V
SS
CNV
SS
18
24
23
21
22
25
Reset input
RESET
Input ports P3
3,
P3
4
Clock input for display Clock output for display
OSC1 OSC2
S
IN
S
CLK
S
OUT
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
P0 (8)
INT3
P1 (8)
P3 (3)
P2 (8)
INT2
INT1
OUT2
OUT1
B
G
R
10 9 8 7 6 5 4 3
16
17 26 27
28 29 30 31 32 33 34 35
15 14 13 12 11 36 37 38
39 40 41 42
I/O port P0
I/O port P1
I/O port P2
D-A
I/O ports P3
0
–P3
2
Output ports P5
2
–P5
5
Notes
Only M37221EASP/FP has D-A converter.
V
SYNC
H
SYNC
Rev.1.00 Oct 01, 2002
REJ03B0134-0100Z
TIM2
TIM3
19
20
Clock
generating
circuit
Timer count source
selection circuit
Fig. 5.1 Functional Block Diagram of M37221
Program
counter
5. FUNCTIONAL BLOCK DIAGRAM
M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
page 5 of 110
ROM
Timer 1
T1 (8)
Timer 2
T2 (8)
Timer 3
T3 (8)
Control signal
Instruction
decoder
Instruction
register (8)
OSD circuit
Timer 4
T4 (8)
PC
L
(8)
Index
register
X (8)
Index
register
Y (8)
Stack
pointer
S (8)
14-bit
PWM circuit
Data
bus
RAM
Program
counter
PC
H
(8)
Address bus
8-bit
arithmetic
and
logical unit
Accumulator
A (8)
Processor
status
register
PS (8)
A-D
comparator
Multi-master
I
2
C-BUS
interface
D-A
converter
(See note)
SI/O(8)
8-bit PWM circuit ROM correction
function
P5 (4)
2 1
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