Data Sheet
PT7C4338 series
Real-time Clock Module (I
2
C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Product Features
•
•
•
Using external 32.768kHz quartz crystal
Supports I
2
C-Bus's high speed mode (400 kHz)
Includes time (Hour/Minute/Second) and calendar
(Year/Month/Date/Day) counter functions (BCD
code)
•
•
•
Programmable square wave output signal
56-byte, battery-backed, nonvolatile (NV) RAM for
data storage
Automatic power-fail detect and switch circuitry of
battery backup
Product Description
The PT7C4338 serial real-time clock is a low-power
clock/calendar with a programmable square-wave output
and 56 bytes of nonvolatile RAM.
Address and data are transferred serially via a 2-wire,
bidirectional bus. The clock/calendar provides seconds,
minutes, hours, day, date, month, and year information.
The date at the end of the month is automatically
adjusted for months with fewer than 31 days, including
corrections for leap year. The clock operates in either the
24-hour or 12-hour format with AM/PM indicator.
Ordering Information
Part Number
PT7C433830WE
PT7C433833WE
PT7C433830UE
PT7C433833UE
Package
Lead free and Green 8-Pin SOIC
Lead free and Green 8-Pin SOIC
Lead free and Green 8-Pin MSOP
Lead free and Green 8-Pin MSOP
Table 1 shows the basic functions of PT7C4338. More
details are shown in section: overview of functions.
Table 1.
Basic functions of PT7C4338
Item
Function
Source: Crystal: 32.768kHz
1
Oscillator
Oscillator enable/disable
Oscillator fail detect
2
Time
Time display
Century bit
3
4
5
6
Alarm interrupt
Programmable square wave output (Hz)
RAM
Battery backup
12-hour
24-hour
PT7C4338
√
√
√
√
√
-
-
1, 4.096k, 8.192k, 32.768k
56×8
√
The PT7C4338 series have a built-in power sense circuit
that detects power failures and automatically switches to
the battery supply.
PT0321(08/09)
1
Ver: 1
Data Sheet
PT7C4338 series
Real-time Clock Module (I
2
C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Pin Assignment
PT7C4338
1
X1
X2
VBAT
GND
VCC
SQW/OUT
SCL
SDA
8
2
7
3
6
4
5
SOIC-8
MSOP-8
Pin Description
Pin no.
1
2
6
5
7
Pin
X1
X2
SCL
SDA
SQW/OUT
Type
I
O
I
I/O
O
Description
32.768kHz Crystal Connections.
The internal oscillator circuitry is designed for operation
with a crystal having a specified load capacitance (CL) of 12.5pF. Pin X1 is the input to the
oscillator and can optionally be connected to an external 32.768kHz oscillator. The output of
the internal oscillator, pin X2, is floated if an external oscillator is connected to pin X1. An
external 32.768kHz oscillator can also drive the PT7C4338. In this configuration, the X1 pin is
connected to the external oscillator signal and the X2 pin is floated.
Serial Clock Input.
SCL is used to synchronize data movement on the I
2
C serial interface.
Serial Data Input/Output.
SDA is the input/output pin for the 2-wire serial interface. The
SDA pin is open-drain output and requires an external pull-up resistor.
Square-Wave/Output Driver.
When enabled and the SQWE bit set to 1, the SQW/OUT pin
outputs one of four square-wave frequencies (1Hz, 4kHz, 8kHz, 32kHz). It is open drain and
requires an external pullup resistor. Operates with either VCC or VBAT applied.
Supply Voltage.
When voltage is applied within normal limits, the device is fully accessible
and data can be written and read. When a backup supply is connected to the device and VCC
is below VPF, reads and writes are inhibited. However, the timekeeping function continues
unaffected by the lower input voltage.
+3V Battery Input.
Backup supply input for any standard 3V lithium cell or other energy
source. Battery voltage must be held between the minimum and maximum limits for proper
operation. If a backup supply is not required, VBAT must be grounded. UL recognized to
ensure against reverse charging when used with a lithium battery.
Ground.
DC power is provided to the device on these pins. VCC is the primary power input.
When voltage is applied within normal limits, the device is fully accessible and data can be
written and read. When a backup supply is connected to the device and VCC is below VPF,
reads and writes are inhibited. However, the timekeeping function continues unaffected by the
lower input voltage.
8
VCC
P
3
VBAT
P
4
GND
P
PT0321(08/09)
2
Ver: 1
Data Sheet
PT7C4338 series
Real-time Clock Module (I
2
C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Function Block
PT0321(08/09)
3
Ver: 1
Data Sheet
PT7C4338 series
Real-time Clock Module (I
2
C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Function Description
Overview of Functions
Clock function
CPU can read or write data including the year (last two digits), month, date, day, hour, minute, and second. Any (two-digit) year
that is a multiple of 4 is treated as a leap year and calculated automatically as such until the year 2100.
Programmable square wave output
A square wave output enable bit controls square wave output at pin 7. 4 frequencies are selectable: 1, 4.096k, 8.192k, 32.768k Hz.
Interface with CPU
Data is read and written via the I
2
C bus interface using two signal lines: SCL (clock) and SDA (data).
Since the output of the I/O pin SDA is open drain, a pull-up resistor should be used on the circuit board if the CPU output I/O is
also open drain.
The SCL's maximum clock frequency is 400 kHz, which supports the I
2
C bus's high-speed mode.
Oscillator enable/disable
Oscillator can be enabled or disabled by CH bit.
Registers
Allocation of registers
Addr.
Function
(hex)
*1
00
01
02
03
04
05
06
07
08~3F
Seconds (00-59)
Minutes (00-59)
Hours (00-23 / 01-12)
Days of the week (01-07)
Dates (01-31)
Months (01-12)
Years (00-99)
Control
*3
RAM
*7
Bit 7
/EOSC
*2
0
0
0
0
0
Y80
OUT
*4
-
Bit 6
S40
M40
12, /24
0
0
0
Y40
0
-
Bit 5
S20
M20
H20 or
P, /A
0
D20
0
Y20
OSF
-
Register definition
Bit 4
Bit 3
S10
M10
H10
0
D10
MO10
Y10
SQWE
*5
-
S8
M8
H8
0
D8
MO8
Y8
0
-
Bit 2
S4
M4
H4
W4
D4
MO4
Y4
0
-
Bit 1
S2
M2
H2
W2
D2
MO2
Y2
RS1
*6
-
Bit 0
S1
M1
H1
W1
D1
MO1
Y1
RS0
*6
-
Caution points:
*1. PT7C4338 uses 6 bits for address. That is if write data to 41H, the data will be written to 01H address register.
*2. Oscillator Enable bit. When this bit is set to 1, oscillator is stopped but time count chain is still active.
*3. Control register was used to select SQW/OUT pin output square wave with one of 4 kinds of frequency or DC level.
*4. Control SQW/OUT pin output DC level when square wave is disabled.
*5. Square wave outputs enable at SQW/OUT pin.
*6. Square wave output frequency select.
*7. PT7C4338 has 56×8 static RAM for customer use. It is volatile RAM.
*8. All bits marked with "0" are read-only bits. Their value when read is always "0". All bits marked with "-" are customer using
space.
PT0321(08/09)
4
Ver: 1
Data Sheet
PT7C4338 series
Real-time Clock Module (I
2
C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Control and status register
Addr.
(hex)
07
Description
Control
(default)
D7
OUT
1
D6
0
0
D5
OSF
1
D4
SQWE
0
D3
0
0
D2
0
0
D1
RS1
1
D0
RS0
1
•
OUT
It controls the output level of the SQW/OUT pin when the square wave output is disabled.
OUT
Read / Write
Data
0
1
Description
When SQWE = 0, SQW/OUT pin output low.
When SQWE = 0, SQW/OUT pin output high.
Default
SQWE (Square Wave Enable)
This bit, when set to a logic 1, will enable the oscillator output. The frequency of the square wave output depends upon the value
of the RS0 and RS1 bits. With the square wave output set to 1Hz, the clock registers update on the falling edge of the square wave.
•
•
RS (Rate Select)
These bits control the frequency of the square wave output when the square wave output has been enabled.
RS1, RS0
Data
00
Read / Write
01
10
11
1
4.096k
8.192k
32.768k
Default
SQW output freq. (Hz)
OSF
Oscillator Stop Flag. A logic 1 in this bit indicates that the oscillator either is stopped or was stopped for some period of time and
may be used to judge the validity of the clock and calendar data. This bit is set to logic 1 anytime that the oscillator stops. The
following are examples of conditions that can cause the OSF bit to be set:
1) The first time power is applied.
2) The voltage present on VCC is insufficient to support oscillation.
3) The CH bit is turned off.
4) External influences on the crystal (e.g., noise, leakage, etc.).
This bit remains at logic 1 until written to logic 0.
•
PT0321(08/09)
5
Ver: 1