A4937
Automotive 3-Phase MOSFET Driver
Features and Benefits
• High current 3-phase gate drive for N-channel MOSFETs
• SPI compatible serial control
• Cross-conduction protection
• Programmable dead time
• 5.5 to 50 V supply voltage range
• TTL inputs compatible with 3.3 V and 5 V logic
• Extensive diagnostics output
• Low current sleep mode
Description
The A4937 is a 3-phase controller for use with N-channel
external power MOSFETs and is specifically designed for
automotive applications.
A unique charge pump regulator provides full (>10 V) gate
drive for battery voltages down to 7 V and allows the A4937
to operate with a reduced gate drive, down to 5.5 V.
A bootstrap capacitor is used to provide the above battery
supply voltage required for N-channel MOSFETs.
Full control over all six power MOSFETs in the 3-phase bridge
is provided, through an SPI compatible serial interface, allowing
motors to be driven with block or overlap commutation. Power
output can be regulated by one or both of the PWM inputs.
The power MOSFETs are protected from shoot-through by
integrated crossover control and programmable dead time.
Integrated diagnostics provide indication of undervoltage,
overtemperature, and power bridge faults, and can be configured
to protect the power MOSFETs under most short circuit
conditions. Detailed diagnostics are available as a serial data
word.
The A4937 is supplied in a 28-pin TSSOP power package with
with exposed pad for enhanced thermal dissipation (package
type LP). This package is lead (Pb) free, with 100% matte-tin
leadframe plating.
Applications
• Electronic power steering (EPS, EHPS, EAS)
• Hydraulic pumps
• Gearbox actuator
Package: 28-pin TSSOP with Exposed
Thermal Pad (suffix LP)
Not to scale
Functional Block Diagram
V
BAT
A8450
Regulator
V
BAT
SPI
A4937
3-Phase
BLDC
Motor
Micro-
controller
PWM
Reset
Diagnostics
A4937A-DS
A4937
Automotive 3-Phase MOSFET Driver
Selection Guide
Part Number
A4937KLPTR-A-T
Packing*
4000 pieces per 13-in. reel
Package
4.4 mm
×
9.7 mm, 1.2 mm maximum height TSSOP
with exposed thermal pad
*Contact Allegro
™
for additional packing options.
Absolute Maximum Ratings*
Characteristic
Load Supply Voltage
Logic Supply Voltage
Terminal VREG
Terminal CP1
Terminal CP2
Logic Inputs
Logic Outputs
Terminal DIAG
Terminal VBRG
Terminals CA, CB, CC
Terminals GHA, GHB, GHC
Terminals SA, SB, SC
Terminals GLA, GLB, GLC
Terminal LSS
Ambient Operating Temperature
Range
Maximum Continuous Junction
Temperature
Transient Junction Temperature
Storage Temperature Range
Symbol
V
BB
V
DD
V
REG
V
CP1
V
CP2
V
I
V
O
V
DIAG
V
BRG
V
Cx
V
GHx
V
Sx
V
GLx
V
LSS
T
A
T
J
(max)
T
tJ
T
stg
Overtemperature event not exceeding 10s,
lifetime duration not exceeding 10 hours,
guaranteed by design characterization.
Limited by power dissipation
STRn, SCK, SDI, PWMH, PWML
RESETn; can be pulled to V
BB
with >22 kΩ
SDO
Notes
Rating
–0.3 to 50
–0.3 to 6
–0.3 to 16
–0.3 to 16
V
CP1
– 0.3 to
V
REG
+ 0.3
–0.3 to 6
–0.3 to 6
–0.3 to V
DD
+ 0.3
–0.3 to V
DD
+ 0.3
–5 to 55
–0.3 to V
REG
+ 50
V
Cx
– 16 to
V
Cx
+ 0.3
V
Cx
– 16 to
V
Cx
+ 0.3
V
REG
– 16 to 18
V
REG
– 16 to 18
–40 to 150
150
175
–55 to 150
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
°C
°C
*With respect to GND. Ratings apply when no other circuit operating constraints are present.
Thermal Characteristics
may require derating at maximum conditions
Characteristic
Package Thermal Resistance (Junction
to Ambient)
Package Thermal Resistance (Junction
to Pad)
Symbol
R
θJA
R
θJP
Test Conditions*
On 4-layer PCB based on JEDEC standard
2-layer PCB with 3.8 in.
2
of copper area
each side
Value
28
32
2
Unit
ºC/W
ºC/W
ºC/W
*Additional thermal information available on the Allegro website.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A4937
Automotive 3-Phase MOSFET Driver
Functional Block Diagram
C
P
VDD
RESETn
Charge
Pump
Regulator
VREG
C
REG
VBRG
Phase A
Battery +
CP2
VBB
VBAT
CP1
PWMH
CA
C
BOOTA
High Side
Drive
Control
Logic
Bootstrap
Monitor
VDS
Monitor
VDS
Monitor
VREG
Low Side
Drive
GLA
R
GATE
Phase C
Phase B
GHA
R
GATE
One of three phases shown
PWML
SA
LSS
STRn
SCK
SDI
SDO
DIAG
Serial
Interface
Diagnostics
and
Protection
GND
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
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