PRELIMINARY
ICS85354-01
D
UAL
2:1/1:2
D
IFFERENTIAL
-
TO
-LVPECL/ECL M
ULTIPLEXER
G
ENERAL
D
ESCRIPTION
The ICS85354-01 is a 2:1/1:2 Multiplexer and
a member of the HiPerClockS
TM
family of high
HiPerClockS™
performance clock solutions from IDT. The 2:1
Multiplexer allows one of 2 inputs to be
selected onto one output pin and the 1:2 MUX
switches one input to one of two outputs. This device may
be useful for multiplexing multi-rate Ethernet Phys which
have 100Mbit and 1000Mbit transmit/receive pairs onto an
optical SFP module which has a single transmit/receive
pair. A 3
rd
mode allows loop back testing and allows
the output of a phy transmit pair to be routed to the phy
input pair. For examples, please refer to the Application
Block diagrams on pages 2-3 of the data sheet.
F
EATURES
•
Dual 2:1/1:2 MUX
•
Threee differential LVPECL outputs
•
Three differential LVPECL clock inputs
•
CLKx pair can accept the following differential input levels:
LVPECL, LVDS, CML
•
Loopback test mode available
•
Maximum output frequency: 2.5GHz
•
Part-to-part skew: 85ps (typical)
•
Additive jitter, RMS: 0.05ps (typical)
•
Propagation delay: 440ps (typical)
•
LVPECL mode operating voltage supply range:
V
CC
= 2.375V to 3.465V, V
EE
= 0V
•
ECL mode operating voltage supply range:
V
CC
= 0V, V
EE
= -3.465V to -2.375V
•
-40°C to 85°C ambient operating temperature
•
Available in both standard (RoHS5) and lead-free (RoHS 6)
packages
ICS
The ICS85354-01 is optimized for applications requiring
very high performance and has a maximum operating
frequency in 2.5GHz. The device is packaged in a small,
3mm x 3mm VFQFN package, making it ideal for use on
space-constrained boards.
B
LOCK
D
IAGRAM
SELB
P
IN
A
SSIGNMENT
SELA
nQB
V
CC
QB
INA0
nINA0
QA0 1
nQA0 2
INB
nINB
16 15 14 13
12
11
10
9
5
INB
INA0
nINA0
INA1
nINA1
LOOP0
0
QA0
nQA0
QA1 3
nQA1 4
6
nINB
7
SELB
8
V
EE
0
QB
nQB
1
ICS85354-01
1
INA1
nINA1
LOOP1
QA1
nQA1
16-Lead VFQFN
3mm x 3mm x 0.925 package body
K Package
Top View
SELA
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product
characterization and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifica-
tions without notice.
85354AK-01
1
REV. A JANUARY 16, 2008
PRELIMINARY
ICS85354-01
D
UAL
2:1/1:2
D
IFFERENTIAL
-
TO
-LVPECL/ECL M
ULTIPLEXER
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 2
3, 4
5
6
7
8
9
10
11
12
13
Name
QA0, nQA0
QA1, nQA1
INB
nINB
SELB
V
EE
nINA1
INA1
nINA0
INA0
V
CC
Type
Output
Output
Input
In p u t
In p u t
Power
Input
Input
Input
Input
Power
Description
Differential output pair. LVPECL/ECL interface levels.
Differential output pair. LVPECL/ECL interface levels.
Pulldown Non-inver ting LVPECL/ECL differential clock input.
Pullup/
Inver ting differential LVPECL clock input. V
CC
/2 default when left floating.
Pulldown
Clock select pin for QBx outputs. When HIGH, selects QB1, nQB1
Pulldown outputs. When LOW, selects QB0, nQB0 outputs.
LVCMOS/LVTTL interface levels.
Negative supply pin.
Pullup/
Inver ting differential LVPECL clock input. V
CC
/2 default when left floating.
Pulldown
Pulldown Non-inver ting LVPECL differential clock input.
Pullup/
Inver ting differential LVPECL clock input. V
CC
/2 default when left floating.
Pulldown
Pulldown Non-inver ting LVPECL differential clock input.
Positive supply pin.
Clock select pin for QA outputs. When HIGH, selects QA output.
14
SELA
Input
Pulldown
When LOW, selects nQA output. LVCMOS/LVTTL interface levels.
15, 16
nQB, QB
Output
Differential output pair. LVPECL/ECL interface levels.
NOTE:
Pulldown and Pullup
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
R
PULLDOWN
R
VCC/2
Parameter
Input Pulldown Resistor
Pullup/Pulldown Resistors
Test Conditions
Minimum
Typical
37.5
37.5
Maximum
Units
kΩ
kΩ
T
ABLE
3.
SELA
0
0
1
1
I
NPUT
C
ONTROL
F
UNCTION
T
ABLE
SELB
0
1
0
1
Mode
LOOP0 selected
LOOP1 selected
Loopback mode: LOOP0
Loopback mode: LOOP1
Control Inputs
85354AK-01
4
REV. A JANUARY 16, 2008
PRELIMINARY
ICS85354-01
D
UAL
2:1/1:2
D
IFFERENTIAL
-
TO
-LVPECL/ECL M
ULTIPLEXER
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Negative Supply Voltage, V
EE
Inputs, V
I
(LVPECL mode)
Inputs, V
I
(ECL mode)
Outputs, I
O
Continuous Current
Surge Current
Storage Temperature, T
STG
Package Thermal Impedance,
θ
JA
(Junction-to-Ambient)
4.6V (LVPECL mode, V
EE
= 0)
NOTE:
Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage
-4.6V (ECL mode, V
CC
= 0)
to the device. These ratings are stress specifi-
-0.5V to V
CC
+ 0.5 V
cations only. Functional operation of product at
0.5V to V
EE
- 0.5V
these conditions or any conditions beyond those
50mA
100mA
-65°C to 150°C
51.5°C/W (0 lfpm)
listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may
affect product reliability.
Operating Temperature Range, TA -40°C to +85°C
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 2.375V
TO
3.465V, V
EE
= 0V
OR
V
CC
= 0V, V
EE
= -3.465V
TO
-2.375V
Symbol
V
CC
I
EE
Parameter
Positive Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
2.375
Typical
3.3
2.5
40
Maximum
3.465
2.625
Units
V
V
mA
T
ABLE
4B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= 2.375V
TO
3.465V
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
SELA,
SELB
SELA,
SELB
Test Conditions
V
CC
= 3.3V
V
CC
= 2.625V
V
CC
= 3.3V
V
CC
= 2.625V
V
CC
= V
IN
= 3.465V,
V
CC
= V
IN
= 2.625V
V
CC
= 3.465 or 2.625V, V
IN
= 0V
-150
Minimum
2
1.7
0
0
Typical
Maximum
V
CC
+ 0.3
V
CC
+ 0.3
0.8
0.7
150
Units
V
V
V
V
µA
µA
85354AK-01
5
REV. A JANUARY 16, 2008
微控制器 MCU
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