3826 Group (A version)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
REJ03B0029-0200
Rev.2.00
2006.05.24
DESCRIPTION
The 3826 group (A version) is the 8-bit microcomputer based on
the 740 family core technology.
The 3826 group (A version) has the LCD drive control circuit, an 8-
channel A/D converter, D/A converter, serial interface and PWM as
additional functions.
The various microcomputers in the 3826 group (A version) include
variations of internal memory size and packaging. For details, re-
fer to the section on part numbering.
For details on availability of microcomputers in the 3826 group (A
version), refer the section on group expansion.
•
Timers ............................................................ 8-bit
✕
3, 16-bit
✕
2
•
Serial interface
•
•
•
•
Serial I/O1 ...................... 8-bit
✕
1 (UART or Clock-synchronous)
Serial I/O2 .................................... 8-bit
✕
1 (Clock-synchronous)
PWM output .................................................................... 8-bit
✕
1
A/D converter ............. 10-bit
✕
8 channels or 8-bit
✕
8 channels
D/A converter .................................................. 8-bit
✕
2 channels
(used as DTMF and CTCSS function)
LCD drive control circuit
Bias ......................................................................... 1/2, 1/3
Duty .................................................................. 1/2, 1/3, 1/4
Common output ................................................................ 4
Segment output .............................................................. 40
2 Clock generating circuits
(connect to external ceramic resonator or quartz-crystal oscillator)
Watchdog timer ............................................................. 14-bit
✕
1
Power source voltage
In high-speed mode (f(X
IN
) = 10 MHz) ................... 4.5 V to 5.5 V
In high-speed mode (f(X
IN
) = 8 MHz) ..................... 4.0 V to 5.5 V
In middle-speed mode (f(X
IN
) = 6 MHz) ................. 1.8 V to 5.5 V
In low-speed mode .................................................. 1.8 V to 5.5 V
Power dissipation
In high-speed mode ................................................... Typ. 28 mW
(f(X
IN
) = 10 MHz, V
CC
= 5 V, Ta = 25 °C)
In low-speed mode ...................................................... Typ. 27
µW
(f(X
IN
) = stop, f(X
CIN
) = 32 kHz, V
CC
= 3 V, Ta = 25 °C)
Operating temperature range ................................... – 20 to 85°C
FEATURES
•
Basic machine-language instructions ....................................... 71
•
The minimum instruction execution time ............................ 0.4
µs
(at 10 MHz oscillation frequency)
•
•
•
•
Memory size
•
•
•
•
•
ROM ................................................................ 48 K to 60 K bytes
RAM ............................................................... 1536 to 2560 bytes
Programmable input/output ports ............................................. 55
Software pull-up resistors .................................................... Built-in
Output ports ................................................................................. 8
Input ports .................................................................................... 1
Interrupts .................................................. 17 sources, 16 vectors
External ................ 7 sources (includes key input interrupt)
Internal ................................................................ 9 sources
Software ................................................................ 1 source
•
•
APPLICATIONS
Camera, household appliances, consumer electronics, etc.
Rev.2.00 May. 24, 2006
REJ03B0028-0200
page 1 of 90
3826 Group (A version)
PIN CONFIGURATION (TOP VIEW)
SEG
10
SEG
11
SEG
12
SEG
13
SEG
14
SEG
15
SEG
16
SEG
17
P3
0
/SEG
18
P3
1
/SEG
19
P3
2
/SEG
20
P3
3
/SEG
21
P3
4
/SEG
22
P3
5
/SEG
23
P3
6
/SEG
24
P3
7
/SEG
25
P0
0
/SEG
26
P0
1
/SEG
27
P0
2
/SEG
28
P0
3
/SEG
29
P0
4
/SEG
30
P0
5
/SEG
31
P0
6
/SEG
32
P0
7
/SEG
33
P1
0
/SEG
34
P1
1
/SEG
35
P1
2
/SEG
36
P1
3
/SEG
37
P1
4
/SEG
38
P1
5
/SEG
39
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
SEG
9
SEG
8
SEG
7
SEG
6
SEG
5
SEG
4
SEG
3
SEG
2
SEG
1
SEG
0
V
CC
V
REF
AV
SS
COM
3
COM
2
COM
1
COM
0
V
L3
V
L2
C
2
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1 2 3 4 5
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
M3826XMXA-XXXFP
P1
6
P1
7
P2
0
P2
1
P2
2
P2
3
P2
4
P2
5
P2
6
P2
7
V
SS
X
OUT
X
IN
X
COUT
X
CIN
RESET
P7
0
/INT
0
P7
1
P7
2
P7
3
Package type : PRQP0100JB-A (100P6S-A)
Fig. 1 Pin configuration (Package type: PRQP0100JB-A)
SEG
13
SEG
14
SEG
15
SEG
16
SEG
17
P3
0
/SEG
18
P3
1
/SEG
19
P3
2
/SEG
20
P3
3
/SEG
21
P3
4
/SEG
22
P3
5
/SEG
23
P3
6
/SEG
24
P3
7
/SEG
25
P0
0
/SEG
26
P0
1
/SEG
27
P0
2
/SEG
28
P0
3
/SEG
29
P0
4
/SEG
30
P0
5
/SEG
31
P0
6
/SEG
32
P0
7
/SEG
33
P1
0
/SEG
34
P1
1
/SEG
35
P1
2
/SEG
36
P1
3
/SEG
37
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
SEG
12
SEG
11
SEG
10
SEG
9
SEG
8
SEG
7
SEG
6
SEG
5
SEG
4
SEG
3
SEG
2
SEG
1
SEG
0
V
CC
V
REF
AV
SS
COM
3
COM
2
COM
1
COM
0
V
L3
V
L2
C
2
C
1
V
L1
C
1
V
L1
P6
7
/AN
7
P6
6
/AN
6
P6
5
/AN
5
P6
4
/AN
4
P6
3
/S
CLK22
/AN
3
P6
2
/S
CLK21
/AN
2
P6
1
/S
OUT2
/AN
1
P6
0
/S
IN2
/AN
0
P5
7
/ADT/DA
2
P5
6
/DA
1
P5
5
/CNTR
1
P5
4
/CNTR
0
P5
3
/RTP
1
P5
2
/RTP
0
P5
1
/PWM
1
P5
0
/PWM
0
P4
7
/S
RDY1
P4
6
/S
CLK1
P4
5
/T
X
D
P4
4
/R
X
D
P4
3
/φ/T
OUT
P4
2
/INT
2
P4
1
/INT
1
P4
0
P7
7
P7
6
P7
5
P7
4
50
49
48
47
46
45
44
43
42
41
40
39
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
M3826XMXA-XXXGP
38
37
36
35
34
33
32
31
30
29
28
27
26
P1
4
/SEG
38
P1
5
/SEG
39
P1
6
P1
7
P2
0
P2
1
P2
2
P2
3
P2
4
P2
5
P2
6
P2
7
V
SS
X
OU
T IN
X
X
COUT
X
CIN
RESET
P7
0
/INT
0
P7
1
P7
2
P7
3
P7
4
P7
5
P7
6
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Package type : PLQP0100KB-A (100P6Q-A)
Fig. 2 Pin configuration (Package type: PLQP0100KB-A)
Rev.2.00 May. 24, 2006
REJ03B0028-0200
page 2 of 90
P6
7
/AN
7
P6
6
/AN
6
P6
5
/AN
5
P6
4
/AN
4
P6
3
/S
CLK22
/AN
3
P6
2
/S
CLK21
/AN
2
P6
1
/S
OUT2
/AN
1
P6
0
/S
IN2
/AN
0
P5
7
/ADT/DA
2
P5
6
/DA
1
P5
5
/CNTR
1
P5
4
/CNTR
0
P5
3
/RTP
1
P5
2
/RTP
0
P5
1
/PWM
1
P5
0
/PWM
0
P4
7
/S
RDY1
P4
6
/S
CLK1
P4
5
/T
X
D
P4
4
/R
X
D
P4
3
/φ/T
OUT
P4
2
/INT
2
P4
1
/INT
1
P4
0
P7
7
FUNCTIONAL BLOCK DIAGRAM (Package type: PRQP0100JB-A)
Reset input
(5V)
(0V)
V
SS
40
Main
clock
input
RESET
35
91
Main
clock
output
V
CC
X
IN
X
OUT
Fig. 3 Functional block diagram
Data bus
2
DA
2
DA
1
CNTR
0
,CNTR
1
INT
0
SI/O2(8)
ADT
36 37
27 28 29 30 31 32 33 34
3
4
5
6
7 8
9 10
92 93
11 12 13 14 15 16 17 18
19 20 21 22 23 24 25 26
65 66 67 68 69 70 71 72
41 42 43 44 45 46 47 48
Key input (Key-on wake up) interrupt
X
COUT
X
CIN
φ
INT
1,
INT
2
P7(8)
P6(8)
P5(8)
P4(8)
Real time port function
Rev.2.00 May. 24, 2006
REJ03B0028-0200
C P U
A
ROM
X
Y
S
PC
H
Timer X (16)
Timer Y (16)
DA2/CTCSS
Timer 1 (8)
Timer 3 (8)
Timer 2 (8)
DA1/DTMF
PS
PC
L
LCD display
RAM
(20 bytes)
RAM
V
L1
C
1
100
C
2
99
V
L2
98
V
L3
1
97
96
95
94
3826 Group (A version)
38
39
page 3 of 90
LCD
drive control
circuit
PWM(8)
SI/O1 (8)
T
OUT
P3(8)
P2(8)
P1(8)
P0(8)
49 50 51 52 53 54 55 56
57 58 59 60 61 62 63 64
Clock generating
circuit
X
CIN
X
COUT
φ
Sub-
clock
input
Sub-
clock
output
COM
0
COM
1
COM
2
COM
3
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
Watchdog
timer
Reset
A/D converter (8)
SEG
0
SEG
1
SEG
2
SEG
3
SEG
4
SEG
5
SEG
6
SEG
7
SEG
8
SEG
9
SEG
10
SEG
11
SEG
12
SEG
13
SEG
14
SEG
15
SEG
16
SEG
17
X
CIN
X
COUT
Sub-clock Sub-clock
input output
I/O port P7
I/O port P6
V
REF
AV
SS
I/O port P5
I/O port P4
Output port P3
I/O port P2
I/O port P1
I/O port P0
3826 Group (A version)
PIN DESCRIPTION
Table 1 Pin description (1)
Pin
V
CC
V
SS
V
REF
AV
SS
Name
Power source
Analog refer-
ence voltage
Analog power
source
Reset input
Clock input
Clock output
Function
Function except a port function
•Apply voltage of power source to V
CC
, and 0 V to V
SS
. (For the limits of V
CC
, refer to “Recom-
mended operating conditions”.
•Reference voltage input pin for A/D converter and D/A converter.
•GND input pin for A/D converter and D/A converter.
•Connect to V
SS
.
•Reset input pin for active “L”.
•Input and output pins for the main clock generating circuit.
•Connect a ceramic resonator or a quartz-crystal oscillator between the X
IN
and X
OUT
pins to set
the oscillation frequency.
•If an external clock is used, connect the clock source to the X
IN
pin and leave the X
OUT
pin open. A
feedback resistor is built-in.
RESET
X
IN
X
OUT
V
L1
–V
L3
C
1
, C
2
COM
0
–COM
3
LCD power
source
Charge-pump
capacitor pin
Common output
•Input 0
≤
V
L1
≤
V
L2
≤
V
L3
voltage.
•Input 0 – V
L3
voltage to LCD. (0
≤
V
L1
≤
V
L2
≤
V
L3
when a voltage is multiplied.)
•External capacitor pins for a voltage multiplier (3 times) of LCD control.
•LCD common output pins.
•COM
2
and COM
3
are not used at 1/2 duty ratio.
•COM
3
is not used at 1/3 duty ratio.
SEG
0
–SEG
17
P0
0
/SEG
26
–
P0
7
/SEG
33
Segment output
I/O port P0
•LCD segment output pins.
•8-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•Pull-up control is enabled.
•I/O direction register allows each 8-bit pin to be pro-
grammed as either input or output.
•LCD segment output pins
P1
0
/SEG
34
–
P1
5
/SEG
39
I/O port P1
•6-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•Pull-up control is enabled.
•I/O direction register allows each 6-bit pin to be pro-
grammed as either input or output.
P1
6
, P1
7
•2-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually programmed as either input or output.
•Pull-up control is enabled.
•8-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•Pull-up control is enabled.
P2
0
– P2
7
I/O port P2
•Key input (key-on wake-up) interrupt
input pins
P3
0
/SEG
18
–
P3
7
/SEG
25
Output port P3
•8-bit output.
•CMOS 3-state output structure.
•Port output control is enabled.
•LCD segment output pins
Rev.2.00 May. 24, 2006
REJ03B0028-0200
page 4 of 90
3826 Group (A version)
Table 2 Pin description (2)
Pin
P4
0
Name
I/O port P4
•1-bit I/O port.
•CMOS compatible input level.
•N-channel open-drain output structure.
•I/O direction register allows this pin to be individually programmed as either input or output.
P4
1
/INT
1
,
P4
2
/INT
2
P4
3
/φ/T
OUT
P4
4
/R
X
D,
P4
5
/T
X
D,
P4
6
/S
CLK1
,
P4
7
/S
RDY1
P5
0
/PWM
0
,
P5
1
/PWM
1
P5
2
/RTP
0
,
P5
3
/RTP
1
P5
4
/CNTR
0
,
P5
5
/CNTR
1
P5
6
/DA
1
P5
7
/ADT/DA
2
P6
0
/S
IN2
/AN
0,
P6
1
/S
OUT2
/AN
1,
P6
2
/S
CLK21
/AN
2,
P6
3
/S
CLK22
/AN
3
P6
4
/AN
4
–
P6
7
/AN
7
P7
0
/INT
0
P7
1
–P7
7
•7-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•Pull-up control is enabled.
I/O port P5
•8-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•Pull-up control is enabled.
•Real time port output pins
•Timer X, Y I/O pins
•D/A converter output pin
•D/A converter output pin
•A/D external trigger input pin
I/O port P6
•8-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•Pull-up control is enabled.
Input port P7
I/O port P7
•1-bit input port.
•7-bit I/O port.
•CMOS compatible input level.
•N-channel open-drain output structure.
•I/O direction register allows each pin to be individually programmed as either input or output.
X
COUT
X
CIN
Sub-clock output
Sub-clock input
•Sub-clock generating circuit I/O pins.
(Connect a oscillator. External clock cannot be used.)
•INT
0
interrupt input pin
•A/D converter input pins
•Serial I/O2 I/O pins
•A/D converter input pins
•PWM output pins
•INT
i
interrupt input pins
•System clock
φ
output pin
•Timer 2 output pin
•Serial I/O1 I/O pins
Function
Function except a port function
Rev.2.00 May. 24, 2006
REJ03B0028-0200
page 5 of 90
编程基础
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
