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74ALVT162821DGG,11

产品描述74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state TSSOP 56-Pin
产品类别逻辑    逻辑   
文件大小233KB,共18页
制造商Nexperia
官网地址https://www.nexperia.com
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74ALVT162821DGG,11概述

74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state TSSOP 56-Pin

74ALVT162821DGG,11规格参数

参数名称属性值
Brand NameNexperia
零件包装代码TSSOP
包装说明TSSOP, TSSOP56,.3,20
针数56
制造商包装代码SOT364-1
其他特性USER SELECTABLE 3.3V VCC
系列ALVT
JESD-30 代码R-PDSO-G56
JESD-609代码e4
长度14.15 mm
负载电容(CL)50 pF
逻辑集成电路类型BUS DRIVER
最大频率@ Nom-Sup150000000 Hz
最大I(ol)0.012 A
湿度敏感等级1
位数10
功能数量2
端口数量2
端子数量56
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE WITH SERIES RESISTOR
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP56,.3,20
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)260
电源2.5/3.3 V
传播延迟(tpd)7 ns
认证状态Not Qualified
座面最大高度1.2 mm
最大供电电压 (Vsup)2.7 V
最小供电电压 (Vsup)2.3 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术BICMOS
温度等级INDUSTRIAL
端子面层NICKEL PALLADIUM GOLD
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
触发器类型POSITIVE EDGE
宽度6.25 mm
Base Number Matches1

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74ALVT162821
Rev. 4 — 24 January 2018
20-bit bus interface D-type flip-flop; positive-edge trigger with
30 Ω termination resistors; 3-state
Product data sheet
1
General description
The 74ALVT162821 high-performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive. It is designed for V
CC
operation
at 2.5 V or 3.3 V with I/O compatibility to 5 V.
The 74ALVT162821 has two 10-bit, edge triggered registers, with each register coupled
to a 3-state output buffer. The two sections of each register are controlled independently
by the clock (nCP) and output enable (nOE) control gates.
Each register is fully edge triggered. The state of each D input, one set-up time before
the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output.
The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS
memories, or MOS microprocessors.
The active low output enable (nOE) controls all ten 3-state buffers independent of the
register operation. When nOE is LOW, the data in the register appears at the outputs.
When nOE is HIGH, the outputs are in high-impedance OFF-state, which means they will
neither drive nor load the bus.
The 74ALVT162821 is designed with 30 Ω series resistance in both HIGH and LOW
output stages. This design reduces the line noise in applications such as memory
address drivers, clock drivers and bus receivers/transmitters. The series termination
resistors reduce overshoot and undershoot and are ideal for driving memory arrays.
2
Features and benefits
Outputs include series resistance of 30 Ω making external termination resistors
unnecessary
20-bit positive-edge triggered register
5 V I/O compatible
Multiple V
CC
and GND pins minimize switching noise
Bus hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion and extraction permitted
Power-up reset
Power-up 3-state
Output capability: +12 mA and -12 mA
Latch-up protection:
JESD17: exceeds 500 mA
ESD protection:
MIL STD 883, method 3015: exceeds 2000 V
MM: exceeds 200 V

74ALVT162821DGG,11相似产品对比

74ALVT162821DGG,11 74ALVT162821DL,512 74ALVT162821DL,518 74ALVT162821DGGY 74ALVT162821DGGS 74ALVT162821DL,118 74ALVT162821DL,112 74ALVT162821DGG:11
描述 74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state TSSOP 56-Pin 74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state SSOP 56-Pin 74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state SSOP 56-Pin 74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state TSSOP 56-Pin 74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state TSSOP 56-Pin 74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state SSOP 56-Pin 74ALVT162821 - 2.5 V / 3.3 V 20-bit bus-interface D-type flip-flop, positive-edge trigger with 30n Ohm termination resistors; 3-state SSOP 56-Pin 74ALVT162821 - 20-bit bus interface D-type flip-flop; positive-edge trigger with 30 Ohmnttttermination resistors; 3-state TSSOP 56-Pin
Brand Name Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia
零件包装代码 TSSOP SSOP SSOP TSSOP TSSOP SSOP SSOP TSSOP
包装说明 TSSOP, TSSOP56,.3,20 SSOP, SSOP, TSOP2, TSOP2, SSOP3-56 7.50 MM, PLASTIC, MO-118AB, SOT371-1, SSOP3-56 TSSOP,
针数 56 56 56 56 56 56 56 56
制造商包装代码 SOT364-1 SOT371-1 SOT371-1 SOT364-1 SOT364-1 SOT371-1 SOT371-1 SOT364-1
系列 ALVT ALVT ALVT ALVT ALVT ALVT - ALVT
JESD-30 代码 R-PDSO-G56 R-PDSO-G56 R-PDSO-G56 R-PDSO-G56 R-PDSO-G56 R-PDSO-G56 - R-PDSO-G56
JESD-609代码 e4 e4 e4 e4 e4 - - e4
长度 14.15 mm 18.425 mm 18.425 mm 14 mm 14 mm 18.425 mm - 14.15 mm
逻辑集成电路类型 BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER - BUS DRIVER
位数 10 10 10 10 10 10 - 10
功能数量 2 2 2 2 2 2 - 2
端口数量 2 2 2 2 2 2 - 2
端子数量 56 56 56 56 56 56 - 56
最高工作温度 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C - 85 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C - -40 °C
输出特性 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR - 3-STATE WITH SERIES RESISTOR
输出极性 TRUE TRUE TRUE TRUE TRUE TRUE - TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY
封装代码 TSSOP SSOP SSOP TSOP2 TSOP2 SSOP - TSSOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR - RECTANGULAR
封装形式 SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, SHRINK PITCH - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd) 7 ns 6.4 ns 6.4 ns 6.4 ns 6.4 ns 7 ns - 7 ns
座面最大高度 1.2 mm 2.8 mm 2.8 mm 1.2 mm 1.2 mm 2.8 mm - 1.2 mm
最大供电电压 (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V - 2.7 V
最小供电电压 (Vsup) 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V - 2.3 V
标称供电电压 (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V - 2.5 V
表面贴装 YES YES YES YES YES YES - YES
技术 BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS - BICMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL - INDUSTRIAL
端子面层 NICKEL PALLADIUM GOLD Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD - - NICKEL PALLADIUM GOLD
端子形式 GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING - GULL WING
端子节距 0.5 mm 0.635 mm 0.635 mm 0.5 mm 0.5 mm 0.635 mm - 0.5 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL - DUAL
宽度 6.25 mm 7.5 mm 7.5 mm 6.1 mm 6.1 mm 7.5 mm - 6.25 mm
Base Number Matches 1 1 1 1 1 1 1 -
Reach Compliance Code - compliant compliant compliant compliant compliant - -

 
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