MH64FCD00.6250MHZ概述

XO, Clock, 0.625MHz Min, 67MHz Max, 0.625MHz Nom

MH64FCD00.6250MHZ规格参数

MH Series Half-Size HCMOS/TTL

Compatible Oscillators

Half-Size HCMOS/TTL Compatible Oscillators

Available Stabilities vs. Temperature

See page 135 for gull wing configuration.

Available Symmetry

A = Available

N = Not Available

S = Standard

C = Consult Factory

Electrical Specifications

Pin Connections

Tri-state Control Logic

Pin 1 high or floating: clock signal output

Pin 1 low: output disables to high impedance

TTL load - See load circuit diagram #1 on page 137. HCMOS load - See load circuit diagram #2 on page 137.

Symmetry is measured at 1.4 V with TTL load, and at 50% Vdd with HCMOS load.

Rise/Fall times are measured between 0.5 V and 2.4 V with TTL load, and between 10% Vdd and 90% Vdd with HCMOS load.

See page 136 for suggested soldering conditions.

器件捷径: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

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