Silicon Zener Diode Series
1N746AUR thru 1N759AUR, 1N4370AUR thru 1N4372AUR,
CDLL746A thru CDLL759A & CDLL4370A thru CDLL4372A
Features
•
•
•
Available in JAN, JANTX and JANTXV
per MIL-PRF-19500/127
Leadless Package for Surface Mount
Metallurgically Bonded
Maximum Ratings
Operating Temperature: -65°C to +175°C
Storage Temperature:
-65°C to +175°C
DC Power Dissipation: 500 mW @ TEC = +125°C
Power Derating: 10 mW / °C above TEC = +125°C
Forward Voltage @ 200mA: 1.1 volts maximum
Electrical Specifications @ +25 ºC (Unless Otherwise Specified)
JEDEC
TYPE
NUMBER
(NOTE 1)
VOLTS
CDLL4370A
CDLL4371A
CDLL4372A
CDLL746A
CDLL747A
CDLL748A
CDLL749A
CDLL750A
CDLL751A
CDLL752A
CDLL753A
CDLL754A
CDLL755A
CDLL756A
CDLL757A
CDLL758A
CDLL759A
2.4
2.7
3.0
3.3
3.6
3.9
4.3
4.7
5.1
5.6
6.2
6.8
7.5
8.2
9.1
10.0
12.0
NOMINAL
ZENER
VOLTAGE
VZ @ IZT
ZENER
TEST
CURRENT
IZT
(NOTE 2)
mA
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
MAXIMUM
ZENER
IMPEDANCE
(NOTE 3)
ZZT@ IZT
OHMS
30
30
29
28
24
23
22
19
17
11
7
5
6
8
10
17
30
μA
100
60
30
5
3
2
2
5
5
5
5
2
2
1
1
1
1
VOLTS
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.5
2.0
2.5
3.5
4.0
5.0
6.0
7.0
8.0
9.0
mA
155
140
125
120
110
100
90
85
75
70
65
60
55
50
45
40
35
MAXIMUM
REVERSE CURRENT
IR @ VR
MAXIMUM
ZENER
CURRENT
IZM
NOTE 1: Zener voltage tolerance on "A" suffix is +5%. No Suffix denotes +10% tolerance,
"C" suffix denotes +2% tollerance and "D" suffix denotes +1% tolerance.
NOTE 2: Zener voltage is measured with the device junction in thermal equilibrium at an ambient
temperature of 25°C + 3°C.
NOTE 3: Zener impedance is derived by superimposing on IZT A 60Hz rms a.c. current equal to 10% of IZT
Revision Date: 11/4/2009
New Product
1
1N746AUR thru 1N759AUR, 1N4370AUR thru 1N4372AUR,
CDLL746A thru CDLL759A & CDLL4370A thru CDLL4372A
Outline Drawing
D
LEADED DESIGN DATA
CASE: DO-213AA, Hermetically sealed glass case. (MELF, SOD-80, LL34)
LEAD FINISH: Tin / Lead
THERMAL RESISTANCE: (R
ӨJEC
): 100 ˚C/W maximum at L = 0 inch
THERMAL IMPEDANCE: (Z
ӨJX
): 25 ˚C/W maximum
S
G
F
G1
POLARITY: Diode to be operated with the banded (cathode) end positive.
MOUNTING POSITION: Any.
MOUNTING SURFACE SELECTION: The Axial Coefficient of Expansion (COE)
Of this Device is Approximately +6 PPM/°C. The COE of the Mounting Surface
System Should Be Selected To Provide A Suitable Match With This Device.
Graphs
Aeroflex / Metelics, Inc.
975 Stewart Drive,
Sunnyvale, CA 94085
Tel: (408) 737-8181
Fax: (408) 733-7645
Sales: 888-641-SEMI (7364)
Hi-Rel Components
9 Hampshire Street,
Lawrence, MA 01840
Tel: (603) 641-3800
Fax: (978) 683-3264
www.aeroflex.com/metelics-hirelcomponents
54 Grenier Field Road,
Londonderry, NH 03053
Tel: (603) 641-3800
Fax: (603)-641-3500
ISO 9001: 2008 certified companies
www.aeroflex.com/metelics
metelics-sales@aeroflex.com
Aeroflex / Metelics, Inc. reserves the right to make changes to any products and services
herein at any time without notice. Consult Aeroflex or an authorized sales representative to
verify that the information in this data sheet is current before using this product. Aeroflex
does not assume any responsibility or liability arising out of the application or use of any
product or service described herein, except as expressly agreed to in writing by Aeroflex;
nor does the purchase, lease, or use of a product or service from Aeroflex convey a license
under any patent rights, copyrights, trademark rights, or any other of the intellectual rights
of Aeroflex or of third parties.
Copyright 2009 Aeroflex / Metelics. All rights reserved.
Revision Date: 11/4/2009
Our passion for performance is defined by three
attributes represented by these three icons:
solution-minded, performance-driven and customer-focused.
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
