©
C U I Stack, Inc.,
1997
F1 Type
Ø15
120˚
3-M3
120˚
Ø44
3-M3
Ø44
2-M2
Ø14
Ø8
Ø10
*
30˚
30˚
PCD36
PCD36
24
25
5.5
0.5
24
5.5
5.5
*Ø8, 9.525 (0.375"), &
12 optional bore sizes
SPECIFICATIONS
OUTPUT WAVEFORM
(Clockwise
rotation viewed from front)
OUTPUT CIRCUITS
TYPE ' ' (Voltage)
2kΩ
20mA
max
TYPE
Supply Voltage
Current
Output
Voltage
Sink Current
Signal Risetime
Freq. Response
""
5 ~ 12
±10%
C
E
R, C
E
P
Sig A
TYPE C (Open Coll) TYPE E (Line-Driver)
Vcc
Signal
30mA
max
5 ~ 12 VDC
24 VDC ±10%
5VDC
P
Signal A
ab cd
Signal B
h
Sig A
Sig B
Sig B
Sig Z
Sig Z
Vcc
Signal
0V
CABLE SHIELD
Vcc
Signal
Inv. Sig
0V
H
L
60mA max.
≥
2.5V
Vcc - 1V
≤
0.5V
20mA max.
≤
2µS
50 - 100kHz
a b c d
0V
CABLE SHIELD
Signal Z
h min
ORDERING INSTRUCTIONS
MEH30-_ _ _ _ _ _ - _ _ - _ _ _ _
P±0.75P
Resolution
Output Format:
" "= TTL voltage
C = Open Coll
E = Line Driver
Input Voltage:
1 = 5VDC
±10%
3 = 5~12VDC
±10%
4 = 24VDC
±10%
Bore Size:
8=
8mm
9525 = 9.525mm
10 =
10mm
12 =
12mm
(<8mm bore sizes available)
P = 1/PPR
a,b,c,d =
h max
MECHANICAL
1. Max Shaft Load; radial: 2.0 kgf
axial: 1.0 kg
f
2. Moment of Inertia: 4 g•cm
2
3. Angular Acceleration: 1x10
4
rad/S
2
4. Max Slewing Speed: 6000 RPM
5. Starting Torque: 30 gf•cm max.
6. Rotational Life: 1 x 10
7
rpm•hrs
P P
h = P ± 0.75P
±
4 8
Wave Duty Ratio: 50% ± 25%
STANDARD RESOLUTIONS
40
72
100
180
200
250
300
360
40 P/R
72 P/R
100 P/R
180 P/R
200 P/R
250 P/R
300 P/R
360 P/R
MEH30-XXXX
400 400 P/R
500 500 P/R
512 512 P/R
600 600 P/R
700 700 P/R
800 800 P/R
1000 1000 P/R
1024 1024 P/R
1200
1500
1800
2000
2048
†
2500
†
3600
†
4500
*†
9000
1200 P/R
1500 P/R
1800 P/R
2000 P/R
2048 P/R
2500 P/R
3600 P/R
4500 P/R
9000 P/R
Bore/Hub:
= Through/No Hub
F1 = Through/Hub
F2 = 14mm depth/Hub
ENVIRONMENTAL
1. Operating Temp: 0° to +60° C
2. Storage Temp: -20° to +80° C
3. Humidity: 90% RH, no condensation
4. Vibration: 10~ 55 Hz, 1.5 mm, 2 hrs
5. Shock: 50G, 11ms, 3 axes, 3 reps
C U I Stack, Inc.
9615 SW Allen Blvd. #103
Beaverton, OR 97005
Tel: 503/643-4899 FAX: 503/643-6129
DRAWN BY
UPDATED
CHECKED
RELEASED
†
24VDC input is not available;
JAS
PART NO.
03/07/00
03/07/00
REV.
Line driver output is not available
*5VDC only
MEH30-XXXXXX-XX-XXXX
A
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
