电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

CY62137CV25LL-70BAIT

产品描述Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48
产品类别存储    存储   
文件大小218KB,共12页
制造商Cypress(赛普拉斯)
下载文档 详细参数 选型对比 全文预览

CY62137CV25LL-70BAIT概述

Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48

CY62137CV25LL-70BAIT规格参数

参数名称属性值
零件包装代码BGA
包装说明TFBGA,
针数48
Reach Compliance Codeunknown
ECCN代码3A991.B.2.A
最长访问时间70 ns
JESD-30 代码S-PBGA-B48
长度7 mm
内存密度2097152 bit
内存集成电路类型STANDARD SRAM
内存宽度16
功能数量1
端子数量48
字数131072 words
字数代码128000
工作模式ASYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织128KX16
封装主体材料PLASTIC/EPOXY
封装代码TFBGA
封装形状SQUARE
封装形式GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行PARALLEL
认证状态Not Qualified
座面最大高度1.2 mm
最大供电电压 (Vsup)2.7 V
最小供电电压 (Vsup)2.2 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式BALL
端子节距0.75 mm
端子位置BOTTOM
宽度7 mm
Base Number Matches1

文档预览

下载PDF文档
CY62137CV25/30/33 MoBL
®
CY62137CV MoBL
®
2M (128K x 16) Static RAM
Features
• Very high speed: 55 ns and 70 ns
• Temperature Ranges
— Industrial: –40°C to +85°C
— Automotive: –40°C to +125°C
• Pin-compatible with the CY62137V
• Ultra-low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 5.5 mA @ f = f
max
(70-ns
speed)
Low and ultra-low standby power
Easy memory expansion with CE and OE features
Automatic power-down when deselected
CMOS for optimum speed/power
Packages offered in a Lead-Free and Non-Lead Free
48-ball FBGA
Life™ (MoBL
®
) in portable applications such as cellular tele-
phones. The devices also has an automatic power-down fea-
ture that significantly reduces power consumption by 80%
when addresses are not toggling. The device can also be put
into standby mode reducing power consumption by more than
99% when deselected (CE HIGH or both BLE and BHE are
HIGH). The input/output pins (I/O
0
through I/O
15
) are placed
in a high-impedance state when: deselected (CE HIGH), out-
puts are disabled (OE HIGH), both Byte High Enable and Byte
Low Enable are disabled (BHE, BLE HIGH), or during a write
operation (CE LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through A
16
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
8
through I/O
15
) is written into the location
specified on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
0
to I/O
7
. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O
8
to I/O
15
. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
Functional Description
[1]
The CY62137CV25/30/33 and CY62137CV are high-perfor-
mance CMOS static RAMs organized as 128K words by 16
bits. These devices feature advanced circuit design to provide
ultra-low active current. This is ideal for providing More Battery
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
10
ROW DECODER
128K x 16
RAM Array
2048 x 1024
SENSE AMPS
I/O
0
–I/O
7
I/O
8
–I/O
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
CE
BHE
BLE
A
11
Power-down
Circuit
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05201 Rev. *E
3901 North First Street
A
12
A
13
A
14
A
15
A
16
San Jose
CA 95134
• 408-943-2600
Revised April 4, 2005

CY62137CV25LL-70BAIT相似产品对比

CY62137CV25LL-70BAIT CY62137CVLL-70BVIT CY62137CV25LL-55BAIT CY62137CVLL-70BAIT CY62137CV25LL-70BVIT CY62137CV30LL-70BAXE
描述 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, VFBGA-48 Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, VFBGA-48 Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
零件包装代码 BGA BGA BGA BGA BGA BGA
包装说明 TFBGA, VFBGA, TFBGA, TFBGA, VFBGA, 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-48
针数 48 48 48 48 48 48
Reach Compliance Code unknown unknown unknown unknown unknown compliant
ECCN代码 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
最长访问时间 70 ns 70 ns 55 ns 70 ns 70 ns 70 ns
JESD-30 代码 S-PBGA-B48 R-PBGA-B48 S-PBGA-B48 S-PBGA-B48 R-PBGA-B48 S-PBGA-B48
长度 7 mm 8 mm 7 mm 7 mm 8 mm 7 mm
内存密度 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit
内存集成电路类型 STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
内存宽度 16 16 16 16 16 16
功能数量 1 1 1 1 1 1
端子数量 48 48 48 48 48 48
字数 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words
字数代码 128000 128000 128000 128000 128000 128000
工作模式 ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
最高工作温度 85 °C 85 °C 85 °C 85 °C 85 °C 125 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
组织 128KX16 128KX16 128KX16 128KX16 128KX16 128KX16
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 TFBGA VFBGA TFBGA TFBGA VFBGA TFBGA
封装形状 SQUARE RECTANGULAR SQUARE SQUARE RECTANGULAR SQUARE
封装形式 GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.2 mm 1 mm 1.2 mm 1.2 mm 1 mm 1.2 mm
最大供电电压 (Vsup) 2.7 V 3.6 V 2.7 V 3.6 V 2.7 V 3.3 V
最小供电电压 (Vsup) 2.2 V 2.7 V 2.2 V 2.7 V 2.2 V 2.7 V
标称供电电压 (Vsup) 2.5 V 3.3 V 2.5 V 3.3 V 2.5 V 3 V
表面贴装 YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL AUTOMOTIVE
端子形式 BALL BALL BALL BALL BALL BALL
端子节距 0.75 mm 0.75 mm 0.75 mm 0.75 mm 0.75 mm 0.75 mm
端子位置 BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
宽度 7 mm 6 mm 7 mm 7 mm 6 mm 7 mm
Base Number Matches 1 1 1 1 - -
请问哪个型号的SD存储卡的控制IC可以和智能卡IC连接。即有7816接口
如题,能提供资料更好。谢谢高手...
jonystar 嵌入式系统
专家组意见
本帖最后由 paulhyde 于 2014-9-15 09:22 编辑 专家组意见 ...
zhshmzd123654 电子竞赛
【GD32L233C-START评测】ML组件控制
借助GD32L233C-START开发板的串口通信功能,不仅可以控制通过串行通讯来管控的设备和功能模块,还能够通过串口将数据发送到上位机来实现界面控件的驱动。 MicroLab就是一种多功能的辅助性工 ......
jinglixixi GD32 MCU
vhdl实现nco,用查找表的方法
紧急求助啊...
rainmoon FPGA/CPLD
FRAM在智能三表(水、电、气)领域已经成为主流了吗?
前不久参加了2014年的智能三表研讨会,重点了解了一下现在很热门的一个存储器——FRAM。Speaker讲述了富士通半导体FRAM 在智能三表的应用优势,他认为富士通FRAM相比EEPROM的优势主要体现在高速 ......
电路艺术 嵌入式系统
PIC 16f877 中关于10位AD转换问题
很奇怪,我转换出来的数字线性度很差,有一直上扬的趋势,我只用到了AD0,时钟是Fosc/32,单片机晶振4M, 为什么我得到的转换结果差这么多,直接加1V电压,转换的结果将近1.5V左右,请问是我哪里没用好? ......
springmorn Microchip MCU

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 2374  1462  221  662  683  2  46  25  13  24 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved