The UT54ACTS153E is a dual four-to-one line selectors/mul-
tiplexer. Common inputs A and B select a value from one of
four sources for each section and routes the value from each
section to their respective outputs. Separate strobe inputs, G
are provided for each of the two four-line sections.
The device is characterized over the full military temperature
range of -55°C to +125°C.
PINOUT
16-Lead Flatpack
Top View
1G
B
1C3
1C2
1C1
1C0
1Y
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
2G
A
2C3
2C2
2C1
2C0
2Y
FUNCTION TABLE
SELECT
INPUTS
B
X
L
L
L
L
H
H
H
H
A
X
L
L
H
H
L
L
H
H
C0
X
L
H
X
X
X
X
X
X
DATA INPUTS
C1
X
X
X
L
H
X
X
X
X
C2
X
X
X
X
X
L
H
X
X
C3
X
X
X
X
X
X
X
L
H
OUTPUT
CONTROL
G
H
L
L
L
L
L
L
L
L
OUTPUT
Y
L
L
H
L
H
L
H
L
H
LOGIC SYMBOL
A
B
1G
1C0
1C1
1C2
1C3
(14)
(2)
(1)
(6)
(5)
(4)
(3)
EN
0
1
2
3
MUX
(7)
0
1
0
-
G
--
3
1Y
(15)
2G
(10)
2C0
(11)
2C1
(12)
2C2
(13)
2C3
(9)
2Y
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
1
LOGIC DIAGRAM
OUTPUT
CONTROL
1G
(1)
1C0 (6)
(5)
(7)
1C1
DATA 1
1C2
1Y
(4)
1C3
(3)
B
SELECT
(2)
A (14)
2C0
(10)
2C1 (11)
DATA 2
2C2
(12)
(9)
2Y
2C3
(13)
OUTPUT
CONTROL
2G
(15)
2
RADIATION HARDNESS SPECIFICATIONS
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
Neutron Fluence
LIMIT
1.0E6
80
120
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
1
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
Θ
JC
I
I
P
D
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these
or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum power dissipation
LIMIT
-0.3 to 7.0
-.3 to V
DD
+.3
-65 to +150
+175
+300
20
±10
1
UNITS
V
V
°C
°C
°C
°C/W
mA
W
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
V
IN
T
C
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
3.0 to 5.5
0 to V
DD
-55 to +125
UNITS
V
V
°C
3
DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACTS153E
7
( V
DD
= 3.0V to 5.5V; V
SS
= 0V
6
; -55°C < T
C
< +125°C)
SYMBOL
V
IL
Description
Low-level input voltage
1
High-level input voltage
1
Input leakage current
Low-level output voltage
3
CONDITION
VDD
3.0V
5.5V
MIN
MAX
0.8
0.8
UNIT
V
V
IH
3.0V
5.5V
2.0
2.75
-1
1
0.4
0.4
2.4
3.15
-100
-200
6
8
-6
-8
2.1
0.84
10
1.6
100
200
V
µA
V
V
V
V
mA
I
IN
V
OL
V
IN
= V
DD
or V
SS
I
OL
= 6mA
I
OL
= 8mA
5.5V
3.0V
4.5V
3.0V
4.5V
3.0V
5.5V
V
OH
High-level output voltage
3
I
OH
= -6mA
I
OH
= -8mA
I
OS
Short-circuit output current
2 ,4
V
O
= V
DD
and V
SS
I
OL
Low level output current
10
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
3.0V
5.5V
3.0V
5.5V
5.5V
3.0V
mA
I
OH
High level output current
10
V
IN
= V
DD
or V
SS
V
OH
= V
DD
-0.4V
mA
P
total
I
DDQ
∆I
DDQ
Power dissipation
2, 8, 9
Quiescent Supply Current
Quiescent Supply Current Delta
C
L
= 50pF
V
IN
= V
DD
or V
SS
For input under test
V
IN
= V
DD
- 2.1V
For all other inputs
V
IN
= V
DD
or V
SS
ƒ
= 1MHz
ƒ
= 1MHz
mW/
MHz
µA
mA
5.5V
5.5V
C
IN
C
OUT
Input capacitance
5
Output capacitance
5
0V
0V
15
15
pF
pF
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%, -
50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density
≤5.0E5
amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose
≤
1E6 rads(Si) per MIL-STD-883 Method 1019 Condition B.
8. Power does not include power contribution of any TTL output sink current
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
4
AC ELECTRICAL CHARACTERISTICS FOR THE UT54ACTS153E
2
(V
DD
= 3.0V to 5.5V; V
SS
= 0V
1
, -55°C < T
C
< +125°C)
SYMBOL
t
PLH1
PARAMETER
Data to output Yn
CONDITION
C
L
= 30pF
V
DD
3.0V & 3.6V
4.5V & 5.5V
C
L
= 50pF
3.0V & 3.6V
4.5V & 5.5V
t
PHL1
Data to output Yn
C
L
= 30pF
3.0V & 3.6V
4.5V & 5.5V
C
L
= 50pF
3.0V & 3.6V
4.5V & 5.5V
t
PLH2
Strobe to output Yn
C
L
= 30pF
3.0V & 3.6V
4.5V & 5.5V
C
L
= 50pF
3.0V & 3.6V
4.5V & 5.5V
t
PHL2
Strobe to output Yn
C
L
= 30pF
3.0V & 3.6V
4.5V & 5.5V
C
L
= 50pF
3.0V & 3.6V
4.5V & 5.5V
t
PLH3
Select to output Yn
C
L
= 30pF
3.0V & 3.6V
4.5V & 5.5V
C
L
= 50pF
3.0V & 3.6V
4.5V & 5.5V
t
PHL3
Select to output Yn
C
L
= 30pF
3.0V & 3.6V
4.5V & 5.5V
C
L
= 50pF
3.0V & 3.6V
4.5V & 5.5V
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for radiation dose
≤
1E6 rads(Si) per MIL-STD-883 Method 1019 Condition B.
电子竞赛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
