PRELIMINARY
Data Sheet No. PD60264 revA
IRS2133D/IRS2135D(J&S)PbF
3-PHASE BRIDGE DRIVER
Features
•
•
•
•
•
•
•
•
•
•
•
•
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt immune
Gate drive supply range from 10 V /12 V to 20 V DC
and up to 25 V for transient
Undervoltage lockout for all channels
Over-current shutdown turns off all six drivers
Three Independent half-bridge drivers
Matched propagation delay for all channels
2.5 V logic compatible
Outputs out of phase with inputs
All parts are LEAD-FREE
Integrated bootstrap diode function
Product Summary
V
OFFSET
I
O
+/- (min.)
V
OUT
t
on/off
(typ.)
Deadtime (typ.)
600 V max.
200 mA / 420 mA
10 V – 20 V or 12 – 20 V
500 ns
230 ns
Applications:
*Motor Control
*Air Conditioners/ Washing Machines
*General Purpose Inverters
*Micro/Mini Inverter Drives
Description
Packages
The IRS213(3, 5)D are high voltage, high speed
power MOSFET and IGBT drivers with three independent high
and low side referenced output channels for 3-phase
applications. Proprietary HVIC technology enables ruggedized
monolithic construction. Logic inputs are compatible with
CMOS or LSTTL outputs, down to 2.5 V logic. An independent
operational amplifier provides analog feedback of bridge
28-Lead SOIC
28-Lead PDIP
current via an external current sense resistor. A current
trip function which terminates all six outputs can also derived
from this resistor. A shutdown function is available to terminate
all six outputs. An open drain FAULT signal is provided to
indicate that an over-current or undervoltage shutdown has
occurred. Fault conditions are cleared with the FLT-CLR lead.
The output drivers feature a high pulse current buffer stage
44-Lead PLCC w/o 12 Leads
designed for minimum driver cross-conduction. Propagation
delays are matched to simplify use in high frequencies applications. The floating channels can be used to drive
N-channel power MOSFETs or IGBTs in the high side configuration which operates up to 600 V.
Typical Connection
Absolute Maximum Ratings
Absolute Maximum Ratings
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IRS2133D/IRS2135D(J&S)PbF
PRELIMINARY
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions. Zener clamps are included between V
CC
& COM (25 V), V
CC
& V
SS
(20V), and V
Bx
& V
Sx
(20 V).
Symbol
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
IN,AMP
V
OUT,AMP
V
FLT
dV
S
/dt
P
D
Definition
High side floating supply voltage
High side floating offset voltage
High side floating output voltage
Fixed supply voltage
Logic ground
Low side output voltage
Logic input voltage (HIN, LIN ITRIP, SD & FLT-CLR)
Op amp input voltage (CA+ & CA-)
Op amp output voltage (CAO)
FAULT output voltage
Allowable offset supply voltage transient
(28 lead PDIP)
Package power dissipation @ T
A
≤
+25 °C
(28 lead SOIC)
(44 lead PLCC)
(28 lead PDIP)
Min.
-0.3
V
B1,2,3
- 20
V
S1,2,3
- 0.3
-0.3
V
CC
- 20
-0.3
V
SS
-0.3
V
SS
-0.3
V
SS
-0.3
V
SS
-0.3
—
—
—
—
—
—
—
—
-55
—
Max.
625
V
B1,2,3
+ 0.3
V
B1,2,3
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+0.3
V
CC
+0.3
V
CC
+0.3
50
1.5
1.6
2.0
83
78
63
150
150
300
Units
V
V/ns
W
R
th,JA
T
J
T
S
T
L
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(28 lead SOIC)
(44 lead PLCC)
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltage referenced to COM. The V
S
offset rating is
tested with all supplies biased at a 15 V differential.
Symbol
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
IN,AMP
V
OUT,AMP
V
FLT
Definition
High side floating supply voltage
High side floating offset voltage
High side floating output voltage
Fixed supply voltage
Low side driver return
Low side output voltage
Logic input voltage (HIN, LIN ITRIP, SD & FLT-CLR)
Op amp input voltage (CA+ & CA-)
Op amp output voltage (CAO)
FAULT output voltage
Min.
V
S1,2,3
+10/12
Note 1
V
S1,2,3
10 or 12
-5
0
V
SS
V
SS
V
SS
V
SS
Max.
V
S1,2,3
+20
600
V
B1,2,3
20
5
V
CC
V
SS
+ 5
V
SS
+ 5
V
SS
+ 5
V
CC
Units
V
Note 1:
Logic operational for V
S
of (COM - 8 V) to (COM + 600 V). Logic state held for V
S
of (COM - 8 V) to (COM –
V
BS
)
.
(Please refer to the Design Tip DT97-3 for more details).
Note 2:
The CAO pin and all input pins (except CA+ & CA-) are internally clamped with a 5.2 V zener diode.
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IRS2133D/IRS2135D(J&S)PbF
PRELIMINARY
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS1,2,3
) = 15 V, unless otherwise specified and T
A
= 25 °C. All static parameters other than I
O
and V
O
are
referenced to V
SS
and are applicable to all six channels. The V
O
and I
O
parameters are referenced to COM and V
S1,2,3
and are applicable to the respective output leads: HO1,2,3 or LO1,2,3
.
Symbol
V
IH
V
IL
V
FCLR,IH
V
FCLR,IL
V
SD,TH+
V
SD,TH-
V
IT,TH+
V
IT,TH-
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
I
SD+
I
SD-
I
ITRIP+
I
ITRIP-
I
FLTCLR+
I
FLTCLR-
V
BSUV+
V
BSUV-
V
BSUVH
V
CCUV+
V
CCUV-
V
CCUVH
R
on, FLT
I
O+
I
O-
Definition
Logic “0” input voltage (OUT = LO)
Logic “1” input voltage (OUT = HI)
Logic “0” fault clear input voltage
Logic “1” fault clear input voltage
SD input positive going threshold
SD input negative going threshold
ITRIP input positive going threshold
ITRIP input negative going threshold
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current IRS213(3,5)D
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current (OUT = HI)
Logic “0” input bias current (OUT = LO)
“High” shutdown bias current
“Low” shutdown bias current
“High” ITRIP bias current
“Low” ITRIP bias current
“High” fault clear input bias current
“Low” fault clear Input bias current
IRS2133D
V
BS
supply undervoltage positive
going threshold
IRS2135D
IRS2133D
V
BS
supply undervoltage negative
going threshold
IRS2135D
IRS2133D
V
BS
supply undervoltage lockout
hysteresis
IRS2135D
IRS2133D
V
CC
supply undervoltage positive
going threshold
IRS2135D
IRS2133D
V
CC
supply undervoltage negative
going threshold
IRS2135D
IRS2133D
V
CC
supply undervoltage lockout
hysteresis
IRS2135D
FAULT low on-resistance
Output high short circuit pulsed current
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.2
—
2.2
—
1.6
1.4
470
360
—
—
—
—
—
—
—
—
—
—
—
—
—
7.6
9.2
7.2
8.3
—
—
7.6
9.2
7.2
8.3
—
—
—
200
420
—
—
—
—
1.9
1.7
570
460
—
—
—
45
4
150
110
5
—
5
—
150
110
8.6
10.4
8.2
9.4
0.4
1
8.6
10.4
8.2
9.4
0.4
1
55
250
500
—
0.8
—
0.8
2.2
2.0
670
560
1
400
50
70
6
200
150
10
100
10
100
200
150
9.6
11.6
9.2
10.5
—
—
9.6
11.6
9.2
10.5
—
—
75
—
mA
—
mA
µA
nA
µA
nA
µA
mV
V
mV
µA
V
IN
= 0 V, I
O
= 20 mA
V
IN
= 5 V, I
O
= 20 mA
V
B1,2,3
= V
S1,2,3
=
600 V
V
IN
= 0 V or 5 V
V
IN
= 0 V or 5 V
V
IN
= 0 V
V
IN
= 5 V
SD = 5 V
SD = 0 V
ITRIP = 5 V
ITRIP = 0 V
FLT-CLR = 0 V
FLT-CLR = 5 V
V
V
Ω
V
OUT
= 0 V, V
IN
= 0 V
PW
≤
10 µs
V
OUT
= 15 V,
V
IN
= 5 V
PW
≤
10 µs
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IRS2133D/IRS2135D(J&S)PbF
PRELIMINARY
Static Electrical Characteristics – (Continued)
V
BIAS
(V
CC
, V
BS1,2,3
) = 15 V, unless otherwise specified and T
A
= 25 °C. All static parameters other than I
O
and V
O
are
referenced to V
SS
and are applicable to all six channels. The V
O
and I
O
parameters are referenced to COM and V
S1,2,3
and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
Symbol
R
BS
V
OS
I
IN,AMP
CMRR
PSRR
V
OH,AMP
V
OL,AMP
I
SRC,AMP
I
SNK,AMP
I
O+,AMP
I
O-,AMP
Definition
Integrated bootstrap diode resistance
Amplifier input offset voltage
Amplifier input bias current
Amplifier common mode rejection ratio
Amplifier power supply rejection ratio
Operational amplifier high level output voltage
Operational amplifier low level output voltage
Operational amplifier output source current
Operational amplifier output sink current
Operational amplifier output high short circuit
current
Operational amplifier output low short circuit
current
Min. Typ. Max. Units Test Conditions
—
—
—
TBD
TBD
4.9
—
4
1
—
—
200
—
—
80
75
5.2
—
7
2.1
10
4
—
10
50
—
dB
—
5.4
30
—
—
mA
—
—
V
mV
Ω
mV
nA
CA+ = 0.2 V,
CA- = CAO
CA+ = CA- = 2.5 V
CA+ = 0.1 V & 5 V,
CA- = CAO
CA+ = 0.2 V,
CA- = CAO,
V
CC
= 10 V & 20 V
CA+ = 1 V, CA- = 0 V
CA+ = 0 V, CA- = 1 V
CA+ = 1 V, CA- = 0 V,
CAO = 4 V
CA+ = 0 V, CA- = 1 V,
CAO = 2 V
CA+ = 5 V, CA- = 0 V,
CAO = 0 V
CA+ = 0 V, CA- = 5 V,
CAO = 5 V
Note 1:
Please refer to Feature Description section for integrated bootstrap functionality information.
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS1,2,3
) = 15 V, V
S1,2,3
= V
SS
, T
A
= 25 °C and C
L
= 1000 pF unless otherwise specified.
Symbol
t
on
t
off
t
r
t
f
t
sd
t
itrip
t
bl
t
flt
t
flt, in
t
fltclr
DT
SR+
SR-
Definition
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
SD to output shutdown propagation delay
ITRIP to output shutdown propagation delay
ITRIP blanking time
ITRIP to FAULT propagation delay
Input filter time ( HIN, LIN, and SD)
FLT-CLR to FAULT clear time
Deadtime, LS turn-off to HS turn-on &
HS turn-off to LS turn-on
Operational amplifier slew rate (+)
Operational amplifier slew rate (-)
Min. Typ. Max. Units Test Conditions
400
400
—
—
400
400
—
350
—
600
150
5
2.4
500
500
80
35
550
660
400
550
325
850
230
10
3.2
700
700
125
55
750
920
—
870
—
1100
350
—
—
V/µs
1 V step input
ns
V
IN
= 0 V & 5 V
V
S1,2,3
= 0 V to 600 V
NOTE 2:
For high side PWM, HIN pulse width must be > 1 µs.
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IRS2133D/IRS2135D(J&S)PbF
PRELIMINARY
Fig. 1. Input/Output Timing Diagram
Fig. 2. Deadtime Waveform Definitions
Fig. 3. Input/Output Switching Time Waveform Definitions
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