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TS80C52ZZZ-VLA

产品描述Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PDIP40, PLASTIC, DIP-40
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小835KB,共54页
制造商Atmel (Microchip)
标准  
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TS80C52ZZZ-VLA概述

Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PDIP40, PLASTIC, DIP-40

TS80C52ZZZ-VLA规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称Atmel (Microchip)
零件包装代码DIP
包装说明PLASTIC, DIP-40
针数40
Reach Compliance Codenot_compliant
ECCN代码3A991.A.2
具有ADCNO
地址总线宽度16
位大小8
最大时钟频率40 MHz
DAC 通道NO
DMA 通道NO
外部数据总线宽度8
JESD-30 代码R-PDIP-T40
JESD-609代码e3
长度51.75 mm
I/O 线路数量32
端子数量40
最高工作温度70 °C
最低工作温度
PWM 通道NO
封装主体材料PLASTIC/EPOXY
封装代码DIP
封装形状RECTANGULAR
封装形式IN-LINE
峰值回流温度(摄氏度)245
认证状态Not Qualified
ROM可编程性MROM
座面最大高度5.08 mm
速度40 MHz
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装NO
技术CMOS
温度等级COMMERCIAL
端子面层MATTE TIN
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间40
宽度15.24 mm
uPs/uCs/外围集成电路类型MICROCONTROLLER
Base Number Matches1

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Features
80C52 Compatible
– 8051 Pin and Instruction Compatible
– Four 8-bit I/O Ports
– Three 16-bit Timer/Counters
– 256 Bytes Scratchpad RAM
High-speed Architecture
40 MHz at 5V, 30 MHz at 3V
X2 Speed Improvement Capability (6 Clocks/Machine Cycle)
– 30 MHz at 5V, 20 MHz at 3V (Equivalent to 60 MHz at 5V, 40 MHz at 3V)
Dual Data Pointer
On-chip ROM/EPROM (8Kbytes)
Programmable Clock Out and Up/Down Timer/Counter 2
Asynchronous Port Reset
Interrupt Structure with
– 6 Interrupt Sources
– 4 Level Priority Interrupt System
Full Duplex Enhanced UART
– Framing Error Detection
– Automatic Address Recognition
Low EMI (Inhibit ALE)
Power Control Modes
– Idle Mode
– Power-down Mode
– Power-off Flag
Once Mode (On-chip Emulation)
Power Supply: 4.5 - 5.5V, 2.7 - 5.5V
Temperature Ranges: Commercial (0 to 70
o
C) and Industrial (-40 to 85
o
C)
Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP44 (13.9 footprint)
8-bit
Microcontroller
8 Kbytes
ROM/OTP,
ROMless
TS80C32X2
TS87C52X2
TS80C52X2
Description
TS80C52X2 is high performance CMOS ROM, OTP, EPROM and ROMless versions
of the 80C51 CMOS single chip 8-bit microcontroller.
The TS80C52X2 retains all features of the 80C51 with extended ROM/EPROM
capacity (8 Kbytes), 256 bytes of internal RAM, a 6-source, 4-level interrupt system,
an on-chip oscilator and three timer/counters.
In addition, the TS80C52X2 has a dual data pointer, a more versatile serial channel
that facilitates multiprocessor communication (EUART) and an X2 speed improve-
ment mechanism.
The fully static design of the TS80C52X2 allows to reduce system power consumption
by bringing the clock frequency down to any value, even DC, without loss of data.
The TS80C52X2 has 2 software-selectable modes of reduced activity for further
reduction in power consumption. In the idle mode the CPU is frozen while the timers,
the serial port and the interrupt system are still operating. In the power-down mode the
RAM is saved and all other functions are inoperative.
Rev. 4184E–8051–09/02
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