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EG-2102CA400MPHRN

产品描述CRYSTAL OSCILLATOR, CLOCK, 400 MHz, PECL OUTPUT
产品类别无源元件    振荡器   
文件大小67KB,共3页
制造商Seiko Epson Corporation
标准  
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EG-2102CA400MPHRN概述

CRYSTAL OSCILLATOR, CLOCK, 400 MHz, PECL OUTPUT

EG-2102CA400MPHRN规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称Seiko Epson Corporation
Reach Compliance Codeunknown
最长下降时间0.4 ns
频率调整-机械YES
频率稳定性100%
JESD-609代码e4
制造商序列号EG-2102CA
安装特点SURFACE MOUNT
标称工作频率400 MHz
最高工作温度85 °C
最低工作温度-5 °C
振荡器类型PECL
输出负载50 OHM
物理尺寸7mm x 5mm x 1.4mm
最长上升时间0.4 ns
最大供电电压3.6 V
最小供电电压3 V
标称供电电压3.3 V
表面贴装YES
最大对称度55/45 %
端子面层Gold (Au)
Base Number Matches1

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EG-2102CA
-High frequency PECL Oscillator-
Features
Generates high frequency clock from a high stability SAW (surface acoustic wave) resonator.
Differential LV-PECL output.
Very low jitter/low phase noise.
Small SMD in 7x5mm, Max1.4mm height, ceramic package.
Applications
10Gigabit Ethernet, Fibre channel, High-end Server
Absolute Maximum Ratings
Item
Supply Voltage
Storage temperature
Solder heat resistance of the
outer lead
Operating range
Item
Supply voltage
Operating temperature
Output load
Frequency characteristics
Item
Oscillation Range
Frequency Stability
Symbol
V
CC
Tstg
Tsol
Unit
V
°C
MIN.
-0.5
-40
TYP.
MAX.
+4.0
+100
Condition
V
CC
- GND
Stored as bare product after
unpacking
Max. 240°C x Max. 10s x 2 times
Symbol
V
CC
T
OPR
RL
Unit
V
°C
MIN.
3.0
0
-5
TYP.
3.3
MAX.
3.6
+70
+85
Condition
P version
R version
Terminated to V
CC
-2V
50
Symbol
fosc
df/f0
Unit
MHz
ppm
(V
CC
=3.0 to 3.6,GND=0.0V,Load=Max,Output bias=Vcc-2.0V)
MIN.
TYP.
MAX.
Condition
100
700
+/-100
H stability *1
+/-50
G stability *1
st
Aging
dfa
ppm
+/-5 1 year
N (Excluding Aging) condition
*1 This includes initial frequency tolerance, temperature variation, supply voltage variation, load variation and reflow drift.
Condition “A” includes 10yrs aging. Condition “N” doesn’t include aging.
Electrical characteristics
Item
Start up time
Current consumption
Disable current
Rise time
Fall time
Duty
at outputs crossing point
High level output voltage
Low level output voltage
High level input voltage
Low level input voltage
Output disable time
Output enable time
Phase Jitter *2
Period Jitter *3
n=50000 samples
(V
CC
=3.0 to 3.6,GND=0.0V,Load=Max,Output bias=Vcc-2.0V)
MIN.
TYP
MAX.
Condition
10
t=0 at V
CC
=3.135V
80
100
With 50Ω load
32
OE=GND
400
20-80% of (VOH-VOL)
400
80-20% of (VOH-VOL)
45
55
P version. 100 to 700MHz
48
52
D version. <350MHz
Vcc-1.03
2.35
Vcc-0.88
V
CC
=3.3V, *4
Vcc-1.81
1.60
Vcc-1.62
V
CC
=3.3V
0.7V
CC
OE Terminal.
0.3V
CC
OE Terminal.
100
When OE turns High to Low.
100
When OE turns Low to High.
-3
0.072x10
12KHz to 20MHz, rms
0.103x10
5
3
3
25
4
-3
Symbol
t
osc
I
OP
I
OE
t
TLH
t
THL
tw/t
V
OH
V
OL
V
IH
V
IL
T
PXZ
T
PZX
t
PJ
t
DJ
t
RJ
t
RMS
t
p-p
t
acc
Unit
ms
mA
mA
ps
ps
%
V
V
V
V
ns
ns
UI
UI
ps
ps
ps
ps
ps
50KHz to 80MHz, rms
10
4
4
40
5
Deterministic Jitter
σ
of Random Jitter
σ
of Total jitter distribution
Peak to Peak of jitter distribution
σ
of Total jitter distribution
Accumulated Jitter *3
n=2 to 50000 cycles
*2 Measured by SSB phase noise test equipment. *3 Measured by Time interval analyzer or oscilloscope. *4 V
OH
= Vcc-1.09 MIN at Ta<0°C
EPSON ELECTRONICS AMERICA, INC.
www.eea.epson.com
EG-2102CA Rev 1.1 2Y5

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