MATRA MHS
HM 65756
32 K
×
8 High Speed CMOS SRAM
Introduction
The HM 65756 is a high speed CMOS static RAM
organised as 32,768
×
8 bits. It is manufactured using
MHS’s high performance CMOS technology.
Access time as fast as 15 ns are available with maximum
power consumption of only 880 mW.
The HM 65756 features fully static operation requiring
no external clocks or timing strobes. The automatic
power-down feature reduces the power consumption by
80 % when the circuit is deselected.
Easy memory expansion is provided by an active low chip
select (CS) an active low output enable (OE), and three
state drivers.
All inputs or outputs of the HM-65756 are TTL
compatible and operate from single 5 V supply thus
simplifying system design.
For military application the HM 65756 is processed
according to the methods of the latest revision of the
MIL STD 883.
Features
D
Fast access time
Commercial : 15/20/25/35/45 ns
Industrial : 20/25/35/45 ns
Automotive/military : 25/35/45 ns
D
Low power consumption
Active : 880 mW
Standby : 220 mW
D
Wide temperature range :
– 55°C to + 125°C
D
D
D
D
300 and 600 mils width package
TTL compatible inputs and outputs
Asynchronous
Capable of withstanding greater than 2 000 V electrostatic
discharge
D
Output enable
D
Single 5 volt supply
D
3.3 v versions are also available. please consult sales
Interface
Block Diagram
Rev. C (11/04/95)
1
HM 65756
Pin Configuration
MATRA MHS
Pin Names
A0–A14: Address inputs
I/00–I/07
VCC
GND
: Inputs/Outputs
: Power
: Ground
CS
OE
W
: Chip-select
: Output enable
: Write Enable
Truth Table
CS
H
L
L
L
OE
X
L
X
H
W
X
H
L
H
INPUT/OUTPUT
Z
Output
Input
Z
MODE
Deselect/
Power down
Read
Write
Output Disable
L = Low, H = High, X = H or L, Z = High impedance.
Electrical Characteristics
Absolute Maximum Ratings
Supply voltage to GND potential : . . . . . . . . . . . . . . . –0.5 V to +7.0 V
DC input voltage : . . . . . . . . . . . . . . . . . . . . . . . . . . . –3.0 V to +7.0 V
DC output voltage in high Z state : . . . . . . . . . . . . . . –0.5 V to +7.0 V
Storage temperature : . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Output current into outputs (low) : . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Electro Static Discharge Voltage . . . . . . . . . . . . . . . . . . . . . . > 2000 V
(MIL STD 883 METHOD 3015)
Operating Range
OPERATING VOLTAGE
Military
Automotive
Industrial
Commercial
(– 2)
(– A)
(– 9)
(– 5)
5 V
±
10 %
5 V
±
10 %
5 V
±
10 %
5 V
±
10 %
OPERATING TEMPERATURE
– 55_C to + 125_C
– 40_C to + 125_C
– 40_C to + 85_C
– 0_C to + 70_C
DC Operating Conditions
PARAMETER
Vcc
Gnd
VIL
VIH
DESCRIPTION
Supply Voltage
Ground
Input low voltage
Input high voltage
MINIMUM
4.5
0.0
– 0.3
2.2
TYPICAL
5.0
0.0
0.0
–
MAXIMUM
5.5
0.0
0.8
VCC
UNIT
V
V
V
V
2
Rev. C (11/04/95)
MATRA MHS
DC Parameters
PARAMETER
IIX
IOZ
IOS
VOL
VOH
Note :
(2)
(3)
(4)
(5)
(2)
HM 65756
DESCRIPTION
Input leakage current
Output leakage current
Output short circuit current
Output low voltage
Output high voltage
MINIMUM
– 10.0
– 10.0
–
–
2.4
TYPICAL
–
–
–
–
–
MAXIMUM
10.0
10.0
– 300.0
0.4
–
UNIT
µA
µA
mA
V
V
2. Gnd < Vin < Vcc, Gnd < Vout < Vcc Output disabled.
3. Vcc = max, Vout = Gnd, duration of the short circuit should not exceed 30 seconds.
Not more than 1 output should be shorted at one time.
4. Vcc min, IOL = 8.0 mA.
5. Vcc min, IOH = –4.0 mA.
Consumption for Commercial (–5) Specification
SYMBOL
ICCSB
ICCSB1
ICCOP
(6)
(7)
(8)
PARAMETER
Standby supply current
Standby supply current
Dynamic operating current
65756
E–5
30
10
155
65756
F–5
40
20
160
65756
H–5
35
20
160
65756
K–5
35
20
150
65756
M–5
35
20
150
UNIT
mA
mA
mA
VALUE
max
max
max
Consumption for Automotive (–A), Industrial (–9) and Military (–2) Specification
SYMBOL
ICCSB
ICCSB1
ICCOP
Note :
(6)
(7)
(8)
PARAMETER
Standby supply current
Standby supply current
Dynamic operating current
65756
F–9
40
20
170
65756
H–9/–2
/–A
35
20
170
65756
K–9/–2
/–A
35
20
160
65756
M–9/–2
/–A
35
20
160
UNIT
mA
mA
mA
VALUE
max
max
max
6. CS
≥
VIH, a pull-up resistor to Vcc on the CS is required to keep the device unselected during the Vcc power-up. Otherwise
IccSB will exceed the above values. Min duty cycle = 100 %.
7. CS
≥
V
CC
– 0.3 V, V
IN
– 0.3 V or V
IN
≤
0.3 V.
8. V
CC
max, Output current = 0 mA, f = max, Vin = Vcc or Gnd.
Capacitance
PARAMETER
Cin
Cout
Note :
(1)
(1)
DESCRIPTION
Input capacitance
Output capacitance
MINIMUM
–
–
TYPICAL
–
–
MAXIMUM
5
7
UNIT
pF
pF
1. TA = 25°C, f = 1 MHz, Vcc = 5.0 V, these parameters are not tested.
Rev. C (11/04/95)
3
HM 65756
AC Parameters
Input pulse levels : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gnd to 3.0 V
Input rise : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
≤
5 ns
MATRA MHS
Input timing reference levels : . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Output loading IOL/IOH
(see figure 1a and 1b)
: . . . . . . . . . . . +30 pF
AC Test Loads and Waveforms
Figure 1
a
Figure 1 b
Figure 2
Write Cycle Specification : Automotive, Commercial, Industrial and Military (note 9)
SYMBOL
TAVAV
TAVWL
TAVWH
TDVWH
TELWH
TWLQZ(8)
TWLWH
TWHAX
TWHDX
TWHQX
Note :
(8)
PARAMETER
Write cycle time
Address set–up time
Address Valid to write end
Data set–up time
CS low to write end
Write low to high Z
Write pulse width
Address hold from write end
Data hold time
Write high to low Z
65756
E–5
15
0
10
9
10
7
9
0
0
3
65756
F–5/–9
20
0
15
10
15
10
15
0
0
3
65756
H–5–9/
–2/–A
25
0
20
15
20 (*)
13
20 (*)
0
0
3
65756
K–5/–9/
–2/–A
35
0
30
17
30
15
25
0
0
3
65756
M–5/–9/
–2/–A
45
0
40
20
40
20
30
0
0
3
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
VALUE
min
min
min
min
min
max
min
min
min
min
8. Specified with CL = 5 pF (see figure 1b).
(*) For commercial (–5) and PDIL, package value is 16 ns.
4
Rev. C (11/04/95)
MATRA MHS
Write Cycle 1 : W Controlled (note 9)
HM 65756
Write Cycle 2 : CS controlled (note 9)
Note :
9. The internal write of the memory is defined by the overlap of CS LOW and W LOW to initiate a write and either signal can
terminate a write by going HIGH. The data input setup and hold timing should be referenced to rising edge of the signal that
terminates the write.
Data out will be high impedance if OE = VIH.
Rev. C (11/04/95)
5
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