Philips Semiconductors
Preliminary specification
Audio recorder engine IC
1
1.1
FEATURES
Channel decoder
SAA7813HL
•
Front-end compatibility with AEGER2A (TZA1020A)
•
Single-ended HF input with bypassable AGC function
•
On-chip 8-bit Analog-to-Digital Converter (ADC)
•
HF digital high-pass filter with variable cut-off frequency
•
HF digital PLL and data slicer
•
EFM demodulation
•
Full error correction strategy; t = 2 and e = 4
•
On-chip error-corrector memory with
±8
frame jitter
margin
•
FIFO overflow concealment for rotational shock
resistance
•
Audio signal interpolation for uncorrectable errors
•
Serial output in Philips I
2
S-bus and EIAJ format for
16, 24 and 32-bit word lengths
•
Master or slave I
2
S-bus clock
•
IEC 60958 (SPDIF, AES/EBU and DOBM) output with
Q-W subcode and programmable category code; output
at n = 1 rate
•
Error correction monitor output
•
CD text decoder.
1.2
Channel encoder
1.3
Spindle motor control
•
Advanced motor control loop allows CAV, CLV and
pseudo-CLV playback
•
Support for 3-pin and 1-pin tacho control
•
Motor control via incoming bit stream or tacho
•
Write to disc controllable by wobble frequency and
position error control.
1.4
Speed of operation
•
1×, 2× and 4× playback
•
1×, 2× and 4× write.
1.5
Microcontroller interface
•
Embedded microcontroller can operate as 33 or 67 MHz
equivalent 80C51
•
Memory mapped interfaces to sub-functions
•
Embedded SRAM (1.5 kbytes XDATA and 736 bytes
IDATA)
•
Four banks; on IDATA and registers; for better
multi-tasking support
•
External flash EPROM programming support
– Serial boot possible with empty flash EPROM
– Internal program upload support.
•
Code space supports up to 1 Mbyte through built-in
bank switching
•
Debug interface for embedded microcontroller.
1.6
Servo processor
•
Serial input with Philips I
2
S-bus and EIAJ formats for
16, 24 and 32 bits
•
IEC 60958 input (44.1 kHz only)
•
Serial subcode input (multiplexed on microcontroller
general I/O)
•
Subcode header processing
•
RS parity byte generation
•
Wobble processing
•
EFM modulation
•
ATIP reading
•
Flywheel mechanism for ATIP sync interpolation
•
Write clock generation based on the wobble frequency;
word input clock or system clock
•
Laser on control signal; re-synchronized on the write
clock
•
CD text encoder (no parity byte generation in hardware).
•
Switched current ADCs for error signal inputs
•
Focus and radial servo loops
•
Automatic closed-loop gain control available for focus
and radial loops
•
Built-in access procedure with fast track count input
•
High speed track crossing velocity measurement
(>350 kHz)
2002 Jun 27
3
Philips Semiconductors
Preliminary specification
Audio recorder engine IC
•
Fast radial brake circuitry
•
EMF actuator damping circuitry
•
Sledge motor servo-loop with enhanced PCS support
•
Sledge stepper motor support
•
Adaptive Repetitive Control (ARC)
•
Optimum Power Calibration (OPC) support for CD-R/W
write speed of up to 4×
•
Debug interface for servo.
1.7
Clock multiplier
2
GENERAL DESCRIPTION
1.8
Boundary scan
SAA7813HL
•
Support for IEEE standard 1149.1 (JTAG) test access
and boundary scan.
The SAA7813 is a combined CD channel
decoder/encoder, digital servo processor and
microcontroller for use in CD audio recorder systems.
•
On-chip clock multipliers allow the use of a 8.4672 MHz
crystal.
3
QUICK REFERENCE DATA
SYMBOL
V
DDCn
V
DDPn
V
DDAn
I
DD
f
XTAL
T
amb
T
stg
Note
1. The analog and digital core supply pins (V
DDAn
and V
DDCn
) must be connected to the same external supply.
4
ORDERING INFORMATION
TYPE
NUMBER
SAA7813HL
Notes
1. When using reflow soldering it is recommended that the dry packing instructions in the
“Quality Reference Handbook”
are followed. The pocketbook can be ordered using the code 9397 750 07825.
2. It is expected that the package will be Moisture Sensitivity Level 3.
Supply of this compact disc IC does not convey an implied license under any patent right to use this IC in any compact
disc application.
PACKAGE
(1)(2)
NAME
LQFP144
DESCRIPTION
plastic low profile quad flat package; 144 leads;
body 20
×
20
×
1.4 mm
VERSION
SOT486-1
PARAMETER
digital core supply voltages V
DDC1
and V
DDC2
; note 1
digital pad supply voltages (3 V) V
DDP1
to V
DDP6
analog supply voltages V
DDA1
to V
DDA3
; note 1
supply current
crystal frequency
operating ambient temperature
storage temperature
MIN.
3.0
3.0
3.0
−
8
0
−55
TYP.
3.3
3.3
3.3
125
8.4672
−
−
MAX.
3.6
3.6
3.6
−
9
60
+125
V
V
V
mA
MHz
°C
°C
UNIT
2002 Jun 27
4
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