DDU4F
5-TAP, TTL-INTERFACED
FIXED DELAY LINE
(SERIES DDU4F)
FEATURES
•
•
•
•
•
•
Five equally spaced outputs
Fits standard 14-pin DIP socket
Low profile
Auto-insertable
Input & outputs fully TTL interfaced & buffered
10 T L fan-out capability
2
data
3
®
delay
devices,
inc.
PACKAGES
IN
1
14
12
T2
T4
GND
4
10
6
7
8
T5
T3
VCC
T1
IN
N/C
N/C
T2
N/C
T4
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VDD
N/C
T1
N/C
T3
N/C
T5
DDU4F-xx
DDU4F-xxA2
DDU4F-xxB2
DDU4F-xxM
DIP
Gull-Wing
J-Lead
Military DIP
Military SMD
DDU4F-xxMC2
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The DDU4F-series device is a 5-tap digitally buffered delay line. The
IN
Signal Input
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an
T1-T5 Tap Outputs
amount determined by the device dash number (See Table). For dash
VCC
+5 Volts
numbers less than 5025, the total delay of the line is measured from T1 to
GND Ground
T5. The nominal tap-to-tap delay increment is given by one-fourth of the
total delay, and the inherent delay from IN to T1 is nominally 3.5ns. For
dash numbers greater than or equal to 5025, the total delay of the line is measured from IN to T5. The
nominal tap-to-tap delay increment is given by one-fifth of this number.
SERIES SPECIFICATIONS
•
•
•
•
•
•
Minimum input pulse width:
20% of total delay
Output rise time:
2ns typical
Supply voltage:
5VDC
±
5%
Supply current:
I
CCL
= 32ma typical
I
CCH
= 7ma typical
Operating temperature:
0° to 70° C
Temp. coefficient of total delay:
100 PPM/°C
3.5ns
25%
25%
25%
25%
DASH NUMBER SPECIFICATIONS
Part
Number
DDU4F-5004
DDU4F-5006
DDU4F-5008
DDU4F-5010
DDU4F-5012
DDU4F-5016
DDU4F-5020
DDU4F-5025
DDU4F-5030
DDU4F-5040
DDU4F-5050
DDU4F-5060
DDU4F-5075
DDU4F-5100
DDU4F-5125
DDU4F-5150
DDU4F-5200
DDU4F-5250
DDU4F-5300
DDU4F-5400
DDU4F-5500
Total
Delay (ns)
4
±
1.0 *
6
±
1.0 *
8
±
2.0 *
10
±
2.0 *
12
±
2.0 *
16
±
2.0 *
20
±
3.0 *
25
±
3.0
30
±
3.0
40
±
3.0
50
±
3.0
60
±
3.0
75
±
4.0
100
±
5.0
125
±
6.5
150
±
7.5
200
±
10.0
250
±
12.5
300
±
15.0
400
±
20.0
500
±
25.0
Delay Per
Tap (ns)
1.0
±
0.5
1.5
±
0.5
2.0
±
1.0
2.5
±
1.0
3.0
±
1.0
4.0
±
1.5
5.0
±
2.0
5.0
±
2.0
6.0
±
2.0
8.0
±
2.0
10.0
±
3.0
12.0
±
3.0
15.0
±
3.0
20.0
±
3.0
25.0
±
3.0
30.0
±
3.0
40.0
±
4.0
50.0
±
5.0
60.0
±
6.0
80.0
±
8.0
100.0
±
10.0
VCC IN
T1
T2
T3
T4
T5 GND
Functional diagram for dash numbers < 5025
20%
20%
20%
20%
20%
VCC IN
T1
T2
T3
T4
T5 GND
Functional diagram for dash numbers >= 5025
©
1997 Data Delay Devices
* Total delay is referenced to first tap output
Input to first tap = 3.5ns
±
1ns
NOTE: Any dash number between 5004 and 5500
not shown is also available.
Doc #97033
12/10/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
DDU4F
APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU4F tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 20% of the total delay and periods as
small as 40% of the total delay (for a symmetric
input), the delays may deviate from their values at
low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
Delay Devices if your application requires device
testing at a specific input condition.
POWER SUPPLY BYPASSING
The DDU4F relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VCC to GND,
located as close as possible to the VCC pin, is
recommended. A wide VCC trace and a clean
ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
V
CC
V
IN
T
STRG
T
LEAD
MIN
-0.3
-0.3
-55
MAX
7.0
V
DD
+0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
High Level Output Voltage
Low Level Output Voltage
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input Current
Short-circuit Output Current
Output High Fan-out
Output Low Fan-out
SYMBOL
V
OH
V
OL
I
OH
I
OL
V
IH
V
IL
V
IK
I
IHH
I
IH
I
IL
I
OS
MIN
2.5
TYP
3.4
0.35
MAX
UNITS
V
V
mA
mA
V
V
V
mA
µA
mA
mA
Unit
Load
NOTES
V
CC
= MIN, I
OH
= MAX
V
IH
= MIN, V
IL
= MAX
V
CC
= MIN, I
OL
= MAX
V
IH
= MIN, V
IL
= MAX
0.5
-1.0
20.0
2.0
0.8
-1.2
0.1
20
-0.6
-150
25
12.5
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
-60
Doc #97033
12/10/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
2
DDU4F
PACKAGE DIMENSIONS
14
12
10
8
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
14
12
10
8
.410
TYP.
1
4
6
7
1
4
6
7
.780 MAX.
.280
MAX.
.290
MAX.
.820 MAX.
.020 .320
TYP. MAX.
.130
±.030
.018 TYP.
.600 TYP.
.100
TYP.
.015 TYP.
.010±.002
.018
TYP.
.070 MAX.
.600±.010
.350
MAX.
.020 TYP.
.300
TYP.
DDU4F-xx (Commercial DIP)
DDU4F-xxM (Military DIP)
.020 TYP.
.040
TYP.
14
12
10
8
.010 TYP.
14
.020 TYP.
12
10
8
.040
TYP.
.270
TYP.
.050 TYP.
.320
TYP.
.270
TYP.
1
4
6
7
.430
TYP.
1
4
6
7
.090
.100
.600
.790 MAX.
.300
MAX.
.050
TYP.
.110
.100
.600
.790 MAX.
.350
MAX.
.110
TYP.
DDU4F-xxA2 (Commercial Gull-Wing)
DDU4F-xxB2 (Commercial J-Lead)
.020 TYP.
14 13 12 11 10
9
8
.040
TYP.
.010±.002
.710 .590
±.005
MAX.
.882
±.005
.007
±.005
1
2
3
4
5
6
7
.090
.100
.600
.780±.020
.280
MAX.
.050
±.010
DDU4F-xxMC2 (Military SMD)
Doc #97033
12/10/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DDU4F
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
o
o
Ambient Temperature:
25 C
±
3 C
Supply Voltage (Vcc):
5.0V
±
0.1V
Input Pulse:
High = 3.0V
±
0.1V
Low = 0.0V
±
0.1V
Source Impedance:
50Ω Max.
Rise/Fall Time:
3.0 ns Max. (measured
between 0.6V and 2.4V )
Pulse Width:
PW
IN
= 1.5 x Total Delay
Period:
PER
IN
= 10 x Total Delay
OUTPUT:
Load:
C
load
:
Threshold:
1 FAST-TTL Gate
5pf
±
10%
1.5V (Rising & Falling)
NOTE:
The above conditions are for test only and do not in any way restrict the operation of the device.
COMPUTER
SYSTEM
PRINTER
REF
PULSE
GENERATOR
OUT
TRIG
IN
DEVICE UNDER
TEST (DUT)
T1
T2
T3
T4
T5
IN
TRIG
TIME INTERVAL
COUNTER
Test Setup
PER
IN
PW
IN
T
RISE
INPUT
SIGNAL
2.4V
1.5V
0.6V
T
FALL
V
IH
2.4V
1.5V
0.6V
V
IL
T
FALL
T
RISE
OUTPUT
SIGNAL
V
OH
1.5V
1.5V
V
OL
Timing Diagram For Testing
Doc #97033
12/10/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
4
消费电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
