Preliminary October 1998
PUMA 64D8000E
8M x 64/72 Synchronous DRAM
Features
•
Unbuffered synchronous DRAM module
organized as 2 banks of 4Mx64 or 72-bits.
•
Space-saving 28mm square 160-pin QFP package
(0.65mm lead pitch).
•
PC-100 compatible operation.
•
LVTTL (3.3V) compatible inputs and outputs.
•
Single 3.3V ± 0.3V power supply.
•
4 internal SDRAM banks.
•
Fully synchronous operation to rising edge of system
clock.
•
Auto refresh and self refresh modes (4k/64ms).
•
•
•
•
•
•
Automatic and controlled precharge commands.
Programmable CAS latency.
Sequential and interleave burst mode operation.
Programmable burst length (1, 2, 4, 8 and full-page)
Serial presence detect(SPD) EEPROM.
On-board decoupling capacitors.
Block Diagram
Vdd
15 pf
CLK2
CKE1
/S1
CKE0
/S0
RAS
CAS
WE
A(13:0 )**
DQ(1 5:0)
DQM0
DQM1
10
10
10k
SCL
4M x 1 6
SDRAM
10
4M x 1 6
SDRAM
SDA
SA0
SA1
SA2
WP
47k
SPD
EEPROM
Description
The 64D8000E is a cost effective, unbuffered synchro-
nous DRAM ECC Memory Module organized as
8,388,608 words x 64 or 72-bits. It uses ten 4Mx16
SDRAM chip-scale devices to achieve the highest
density possible in a 160-pin Quad Flat Pack(QFP).
The QFP is designed to be soldered directly to the PCB,
eliminating all socket reliability problems. The module
pin out is designed toallow an easy transition from
DIMM based designs.
The 64D8000E is Intel PC-100 compatible and can
sustain data transfer rates up to 100mhz. A 66mhz
version is also available. All control, address, and data
input/output circuits are sampled on the positive edge
of the system clock for fully synchronous operation.
A 256 byte EEPROM is used to implement serial
presence detect capability onboard the module. The
lower 128 bytes is reserved for module configurations
programmed by the factory. The upper 128 bytes are
available for customer use.
The 64D8000E is ideal for PC-100 designs that require
high reliability and density in a low profile package.
CLK0
15 pf
4M x 1 6
SDRAM
DQ(4 7:32)
DQM4
DQM5
10
4M x 1 6
SDRAM
**A12 is connected to BA1
A13 is connected to BA0
4M x 1 6
SDRAM
CB(7:0)
10
4M x 1 6
SDRAM
/S3
/S2
CLK3
10
15 pf
4M x 1 6
SDRAM
10
4M x 1 6
SDRAM
DQ(3 1:16)
DQM2
DQM3
10
CLK1
10 pf
4M x 1 6
SDRAM
DQ(6 3:48)
DQM6
DQM7
10
4M x 1 6
SDRAM
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