Voltage Range . . . . . . . . . . . . . . . . . . . . . 4V to 36V or
±2V
to
±18V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply. Temperatures and/or supply voltages must be limited to keep dissipation within max-
imum rating.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Large-Signal Voltage Gain
(See Figures 12, 27) (Note 3)
Common Mode Rejection
Ratio (See Figure 17)
For Equipment Design, V
SUPPLY
=
±15V,
T
A
= 25
o
C, Unless Otherwise Specified
CA3240
SYMBOL
V
IO
I
IO
I
I
A
OL
CMRR
MIN
-
-
-
20
86
-
70
V
ICR
PSRR
(∆V
IO
/∆V±)
V
OM
+
V
OM
-
V
OM-
I+
P
D
-15
-
76
12
-14
0.4
-
-
TYP
5
0.5
10
100
100
32
90
-15.5 to
+12.5
100
80
13
-14.4
0.13
8
240
MAX
15
30
50
-
-
320
-
11
150
-
-
-
-
12
360
MIN
-
-
-
20
86
-
70
-15
-
76
12
-14
0.4
-
-
CA3240A
TYP
2
0.5
10
100
100
32
90
-15.5 to
+12.5
100
80
13
-14.4
0.13
8
240
MAX
5
20
40
-
-
320
-
12
150
-
-
-
-
12
360
UNITS
mV
pA
pA
kV/V
dB
µV/V
dB
V
µV/V
dB
V
V
V
mA
mW
Common Mode Input Voltage Range
(See Figure24)
Power Supply Rejection Ratio
(See Figure 19)
Maximum Output Voltage (Note 4)
(See Figures 23, 24)
Maximum Output Voltage (Note 5)
Total Supply Current
(See Figure 15) For Both Amps
Total Device Dissipation
NOTES:
3. At V
O
= 26V
P-P
, +12V, -14V and R
L
= 2kΩ.
4. At R
L
= 2kΩ.
5. At V+ = 5V, V- = GND, I
SINK
= 200µA.
Electrical Specifications
PARAMETER
Input Resistance
Input Capacitance
Output Resistance
For Equipment Design, V
SUPPLY
=
±15V,
T
A
= 25
o
C, Unless Otherwise Specified
TYPICAL VALUES
SYMBOL
R
I
C
I
R
O
e
N
BW = 140kHz, R
S
= 1MΩ
TEST CONDITIONS
CA3240A CA3240
1.5
4
60
48
1.5
4
60
48
UNITS
TΩ
pF
Ω
µV
Equivalent Wideband Input Noise Voltage
(See Figure 2)
2
FN1050.6
March 4, 2005
CA3240, CA3240A
Electrical Specifications
PARAMETER
Equivalent Input Noise Voltage
(See Figure 18)
Short-Circuit Current to Opposite Supply
For Equipment Design, V
SUPPLY
=
±15V,
T
A
= 25
o
C, Unless Otherwise Specified
(Continued)
TYPICAL VALUES
SYMBOL
e
N
I
OM
+
I
OM
-
Gain Bandwidth Product (See Figures 13, 27)
Slew Rate (See Figure 14)
Transient Response (See Figure 1)
f
T
SR
t
r
OS
Settling Time at 10V
P-P
(See Figure 25)
Crosstalk (See Figure 22)
t
S
R
L
= 2kΩ, C
L
= 100pF
R
L
= 2kΩ, C
L
= 100pF
A
V
= +1, R
L
= 2kΩ, C
L
= 100pF,
Voltage Follower
f = 1kHz
Rise Time
Overshoot
To 1mV
To 10mV
TEST CONDITIONS
f = 1kHz, R
S
= 100Ω
f = 10kHz, R
S
= 100Ω
Source
Sink
CA3240A CA3240
40
12
40
11
4.5
9
0.08
10
4.5
1.4
120
40
12
40
11
4.5
9
0.08
10
4.5
1.4
120
UNITS
nV/√Hz
nV/√Hz
mA
mA
MHz
V/µs
µs
%
µs
µs
dB
Electrical Specifications
For Equipment Design, at V
SUPPLY
=
±15V,
T
A
= -40 to 85
o
C, Unless Otherwise Specified
TYPICAL VALUES
PARAMETER
Input Offset Voltage
Input Offset Current (Note 8)
Input Current (Note 8)
Large Signal Voltage Gain (See Figures 12, 27), (Note 6)
SYMBOL
|V
IO
|
|I
IO
|
I
I
A
OL
CMRR
CA3240A
3
32
640
63
96
CA3240
10
32
640
63
96
32
90
-15 to +12.3
150
76
12.4
-14.2
8.4
252
15
UNITS
mV
pA
pA
kV/V
dB
µV/V
dB
V
µV/V
dB
V
V
mA
mW
µV/
o
C
Common Mode Rejection Ratio (See Figure 17)
32
90
Common Mode Input Voltage Range (See Figure 24)
Power Supply Rejection Ratio (See Figure 19)
V
ICR
PSRR
(∆V
IO
/∆V±)
V
OM
+
V
OM
-
I+
P
D
∆V
IO
/∆T
-15 to +12.3
150
76
12.4
-14.2
8.4
252
15
Maximum Output Voltage (Note 7) (See Figures 23, 24)
Supply Current (See Figure 15) Total For Both Amps
Total Device Dissipation
Temperature Coefficient of Input Offset Voltage
NOTES:
6. At V
O
= 26V
P-P
, +12V, -14V and R
L
= 2kΩ.
7. At R
L
= 2kΩ.
8. At T
A
= 85
o
C.
Electrical Specifications
For Equipment Design, at V+ = 5V, V- = 0V, T
A
= 25
o
C, Unless Otherwise Specified
TYPICAL VALUES
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Input Resistance
Large Signal Voltage Gain (See Figures 12, 27)
SYMBOL
|V
IO
|
|I
IO
|
I
I
R
IN
A
OL
CA3240A
2
0.1
2
1
100
100
CA3240
5
0.1
2
1
100
100
UNITS
mV
pA
pA
TΩ
kV/V
dB
3
FN1050.6
March 4, 2005
CA3240, CA3240A
Electrical Specifications
For Equipment Design, at V+ = 5V, V- = 0V, T
A
= 25
o
C, Unless Otherwise Specified
(Continued)
TYPICAL VALUES
PARAMETER
Common-Mode Rejection Ratio
SYMBOL
CMRR
CA3240A
32
90
Common-Mode Input Voltage Range (See Figure 24)
V
ICR
PSRR
-0.5
2.6
Power Supply Rejection Ratio
31.6
90
Maximum Output Voltage (See Figures 23, 24)
V
OM
+
V
OM
-
Maximum Output Current
Source
Sink
Slew Rate (See Figure14)
Gain Bandwidth Product (See Figure 13)
Supply Current (See Figure 15)
Device Dissipation
I
OM
+
I
OM
-
SR
f
T
I+
P
D
3
0.3
20
1
7
4.5
4
20
CA3240
32
90
-0.5
2.6
31.6
90
3
0.3
20
1
7
4.5
4
20
UNITS
µV/V
dB
V
V
µV/V
dB
V
V
mA
mA
V/µs
MHz
mA
mW
Test Circuits and Waveforms
50mV/Div., 200ns/Div.
Top Trace: Input, Bottom Trace: Output
FIGURE 1A. SMALL SIGNAL RESPONSE
+15V
10kΩ
+
CA3240
0.1µF
5V/Div., 1µs/Div.
Top Trace: Input, Bottom Trace: Output
FIGURE 1B. LARGE SIGNAL RESPONSE
SIMULATED
LOAD
2kΩ
-
0.1µF
100pF
-15V
2kΩ
0.05µF
BW (-3dB) = 4.5MHz
SR = 9V/µs
FIGURE 1C. TEST CIRCUIT
FIGURE 1. SPLIT-SUPPLY VOLTAGE FOLLOWER TEST CIRCUIT AND ASSOCIATED WAVEFORMS
单片机
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