MMUN2218L
Digital Transistor (BRT)
R1 = 1.0 kW, R2 = 10 kW
NPN Transistors with Monolithic Bias
Resistor Network
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This digital transistor is designed to replace a single device and its
external resistor bias network. The Bias Resistor Transistor (BRT)
contains a single transistor with a monolithic bias network consisting
of two resistors; a series base resistor and a base−emitter resistor. The
BRT eliminates these individual components by integrating them into
a single device. The use of a BRT can reduce both system cost and
board space.
Features
PIN CONNECTIONS
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
BASE
(INPUT)
R1
R2
•
•
•
•
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PIN 2
EMITTER
(GROUND)
MARKING DIAGRAM
SOT−23
CASE 318
STYLE 6
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current
−
Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
30
5
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
AA6 MG
G
1
AA6
= Specific Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
October, 2016
−
Rev. 1
1
Publication Order Number:
MMUN2218L/D
MMUN2218L
Table 2. THERMAL CHARACTERISTICS
Characteristic
THERMAL CHARACTERISTICS (SOT−23)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 Inch Pad.
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
246
400
2.0
3.2
508
311
174
208
−55
to +150
mW
mW/°C
°C/W
°C/W
°C
Symbol
Max
Unit
R
qJA
R
qJL
T
J
, T
stg
Table 3. ELECTRICAL CHARACTERISTICS
(T
A
= 25°C, unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector−Base Cutoff Current
(V
CB
= 50 V, I
E
= 0)
Collector−Emitter Cutoff Current
(V
CE
= 50 V, I
B
= 0)
Emitter−Base Cutoff Current
(V
EB
= 6.0 V, I
C
= 0)
Collector−Base Breakdown Voltage
(I
C
= 10
mA,
I
E
= 0)
Collector−Emitter Breakdown Voltage (Note 3)
(I
C
= 2.0 mA, I
B
= 0)
ON CHARACTERISTICS
DC Current Gain (Note 5)
(I
C
= 5.0 mA, V
CE
= 10 V)
Collector
*Emitter
Saturation Voltage (Note 3)
(I
C
= 10 mA, I
B
= 1.0 mA)
Input Voltage (off)
(V
CE
= 5.0 V, I
C
= 100
mA)
Input Voltage (on)
(V
CE
= 0.3 V, I
C
= 5 mA)
Output Voltage (on)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
Output Voltage (off)
(V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
3. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle
v
2%.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
h
FE
40
V
CE(sat)
−
V
i(off)
V
i(on)
V
OL
−
V
OH
4.9
R1
R
1
/R
2
0.7
0.08
−
1.0
0.1
−
1.3
0.12
kW
−
0.2
Vdc
−
1.3
−
0.7
0.9
0.25
0.5
−
Vdc
Vdc
Vdc
60
−
Vdc
I
CBO
I
CEO
−
I
EBO
−
V
(BR)CBO
50
V
(BR)CEO
50
−
−
−
−
Vdc
−
0.60
Vdc
−
100
mAdc
−
−
100
nAdc
nAdc
Symbol
Min
Typ
Max
Unit
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3
MMUN2218L
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AR
D
0.25
3
E
1
2
HE
L
L1
VIEW C
T
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
T
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0
_
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10
_
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0
_
INCHES
NOM
MAX
0.039
0.044
0.002
0.004
0.017
0.020
0.006
0.008
0.114
0.120
0.051
0.055
0.075
0.080
0.017
0.022
0.021
0.027
0.094
0.104
−−−
10
_
3X
b
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
END VIEW
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
RECOMMENDED
SOLDERING FOOTPRINT*
2.90
0.90
3X
3X
0.80
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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MMUN2218L/D