Model 581
Stratum 3 Performance
Temperature Compensated Crystal Oscillator
FEATURES
•
•
•
•
•
•
•
•
•
•
HCMOS Output
Optional Voltage Control for Frequency Tuning [VCTCXO]
5.0mm x 3.2mm Surface Mount Package
Frequency Range 5 – 52 MHz
Fundamental Crystal Design
Operating Voltage, +3.3Vdc or +5.0Vdc
Overall Frequency Stability ±4.6ppm
Operating Temperature to -40°C to +85°C
Tape & Reel Packaging Standard, EIA-418
RoHS/Green Compliant [6/6]
APPLICATIONS
The Model 581 is a quartz based analog TCXO with a HCMOS output and optional frequency tuning.
M581 is suitable for applications requiring Stratum 3 performance such as base stations, small cells, 1588 and
Synchronous Ethernet timing, wireless communications, test and measurement.
ORDERING INFORMATION
581
SUPPLY VOLTAGE
R = +3.0Vdc
S = +5.0Vdc
L = +3.3Vdc
FREQUENCY
Product Frequency Code
[3 digits]
Refer to document 016-1454-0, Frequency
Code Tables.
PACKAGING OPTIONS
T - 1k pcs./reel
FREQUENCY TUNING [AFC]
T = No AFC [TCXO]
A = ±5ppm - ±8ppm [VCTCXO]
OPERATING TEMPERATURE RANGE
FREQUENCY STABILITY *
X5 = ±0.05ppm
01 = ±0.10ppm
02 = ±0.20ppm
1
2
X2 = ±0.28ppm
05 = ±0.50ppm
* Frequency vs. Temperature Only
1] Only available with temperature range codes "W" and "H".
2] Only available with temperature range codes "W", "H" and "C".
W = 0°C to +55°C
H = -10°C to +60°C
C = -20°C to +70°C
D = -30°C to +85°C
I = -40°C to +85°C
Not all performance combinations and frequencies may be available.
Contact your local CTS Representative or CTS Customer Service for availability.
PACKAGING INFORMATION
[reference]
Device quantity is 1k pcs. maximum per 180mm reel.
Document No. 008-0541-0
Page 1 - 3
Rev. A
www.ctscorp.com
Stratum 3 TCXO/VC-TCXO – HCMOS
ELECTRICAL CHARACTERISTICS
PARAMETER
Maximum Supply Voltage
Maximum Control Voltage
Storage Temperature
Operating Temperature
Order Code 'C'
Order Code 'I'
Frequency Range
Supply Voltage
Order Code 'R'
Order Code 'L'
Order Code 'S'
ELECTRICAL PARAMETERS
Supply Current
Frequency Stability
Overall Frequency Stability
vs. Initial Calibration
vs. Operating Temperature
vs. Supply Voltage
vs. Load
vs. Aging
Holdover
Control Voltage
Frequency Tuning
[VCTCXO Only]
V
C
Input Impedance
Output Waveform
Output Voltage Levels
Logic '1' Level
Logic '0' Level
Output Load
Rise and Fall Time
Output Duty Cycle
Start Up Time
Phase Noise
2
1
Model 581
SYMBOL
V
CC
V
C
T
STG
T
A
f
O
V
CC
CONDITIONS
-
-
-
-
-
MIN
-0.6
-0.5
-40
-20
-40
5
2.85
3.14
4.75
-
TYP
-
-
-
MAX
6.0
V
CC
+100
+70
+85
52
3.15
3.47
5.25
6.0
4.60
1.00
0.28
0.20
0.20
3.00
0.40
2.5
-
UNIT
V
V
°C
°C
MHz
+25
-
3.0
3.3
5.0
-
-
-
-
-
-
-
-
1.5
5-8
-
±5%
V
I
CC
Δf/f
O
Reference to f
O
, Including 20 years aging
@ +25°C, at time of shipment
[Fmax. - Fmin.]/2, over -40°C to +85°C
Δf/f
25
±5% change @ +25°C
±5% change
20 years @ +40°C
Δf/f
O
V
C
-
ZV
C
HCMOS
V
OH
V
OL
C
L
T
R
, T
F
SYM
T
S
-
@ 20% - 80% Levels
@ 50% Level
-
-
HCMOS Load
HCMOS Load
-
[Fmax. - Fmin.]/2, over 24 hours
-
V
C
= 1.5V ±1.0V, monotonic positive
-
mA
-
-
-
-
-
-
-
0.5
100
± ppm
V
± ppm
kOhm
0.9*V
CC
-
-
-
45
-
-
-
-
3.0
-
-
-
0.1*V
CC
15
6.0
55
2
V
pF
ns
%
ms
dBc/Hz
Notes:
1. See Ordering Information for stability options.
2. Phase Noise performance may vary based on output frequency. See example plot at 10MHz below.
Document No. 008-0541-0
Page 2 - 3
Rev. A
Stratum 3 TCXO/VC-TCXO – HCMOS
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
MARKING INFORMATION
1. M581 – CTS Model Series.
2.
●
– Pin 1 identifier.
3. C – CTS identifier.4.
4. D – Date code. See Table II for codes.
5. xxx – Frequency Code.
Refer to document 016-1454-0, Frequency Code Tables.
NOTES
1. DO NOT make connections to non-labeled pins.
Castellation pins may have internal connections
used in the manufacturing process.
2. Termination pads (e4); barrier plating is nickel
[Ni] with gold [Au] flash plate.
3. Reflow conditions per JEDEC J-STD-020,
260°C maximum.
4. MSL = 1.
D.U.T. PIN ASSIGNMENTS
PIN
1
2
3
4
SYMBOL
V
C
GND
Output
V
CC
DESCRIPTION
Control Voltage – VCTCXO
NC - TCXO
Circuit & Package Ground
HCMOS Output
Supply Voltage
SUGGESTED SOLDER PAD GEOMETRY
Model 581
M581
●
CDXXX
TEST CIRCUIT – HCMOS LOAD
TABLE II – DATE CODE
MONTH
YEAR
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
JAN
A
N
a
n
FEB
B
P
b
p
MAR
C
Q
c
q
APR
D
R
d
r
MAY
E
S
e
s
JUN
F
T
f
t
JUL
G
U
g
u
AUG
H
V
h
v
SEP
J
W
j
w
OCT
K
X
k
x
NOV
L
Y
l
y
DEC
M
Z
m
z
Document No. 008-0541-0
Page 3 - 3
Rev. A
FPGA/CPLD
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