8XC196KD/8XC196KD20
8XC196KD VERTICAL WINDOWING
MAP
Table 1. 128-Byte Windows
Address to
Remap
0380H
0300H
0280H
0200H
0180H
0100H
0080H
0000H
Device
Series
KD
KD
KD
KD
KC, KD
KC, KD
KC, KD
KC, KD
WSR Contents
X001 0111B
e
17H
X001 0110B
e
16H
X001 0101B
e
15H
X001 0100B
e
14H
X001 0011B
e
13H
X001 0010B
e
12H
X001 0001B
e
11H
X001 0000B
e
10H
Table 3. 32-Byte Windows
Address to
Remap
03E0H
03C0H
03A0H
0380H
0360H
0340H
0320H
0300H
02E0H
02C0H
02A0H
0280H
0260H
0240H
0220H
0200H
01E0H
01C0H
01A0H
0180H
0160H
0140H
0120H
0100H
00E0H
00C0H
00A0H
0080H
0060H
0040H
0020H
0000H
Device
Series
KD
KD
KD
KD
KD
KD
KD
KD
KD
KD
KD
KD
KD
KD
KD
KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
WSR Contents
X101 1111B
e
5FH
X101 1110B
e
5EH
X101 1101B
e
5DH
X101 1100B
e
5CH
X101 1011B
e
5BH
X101 1010B
e
5AH
X101 1001B
e
59H
X101 1000B
e
58H
X101 0111B
e
57H
X101 0110B
e
56H
X101 0101B
e
55H
X101 0100B
e
54H
X101 0011B
e
53H
X101 0010B
e
52H
X101 0001B
e
51H
X101 0000B
e
50H
X100 1111B
e
4FH
X100 1110B
e
4EH
X100 1101B
e
4DH
X100 1100B
e
4CH
X100 1011B
e
4BH
X100 1010B
e
4AH
X100 1001B
e
49H
X100 1000B
e
48H
X100 0111B
e
47H
X100 0110B
e
46H
X100 0101B
e
45H
X100 0100B
e
44H
X100 0011B
e
43H
X100 0010B
e
42H
X100 0001B
e
41H
X100 0000B
e
40H
Window in Lower Register File: 80H ±FFH
Table 2. 64-Byte Windows
Address to
Remap
03C0H
0380H
0340H
0300H
02C0H
0280H
0240H
0200H
01C0H
0180H
0140H
0100H
00C0H
0080H
0040H
0000H
Device
Series
KD
KD
KD
KD
KD
KD
KD
KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
KC, KD
WSR Contents
X010 1111B
e
2FH
X010 1110B
e
2EH
X010 1101B
e
2DH
X010 1100B
e
2CH
X010 1011B
e
2BH
X010 1010B
e
2AH
X010 1001B
e
29H
X010 1000B
e
28H
X010 0111B
e
27H
X010 0110B
e
26H
X010 0101B
e
25H
X010 0100B
e
24H
X010 0011B
e
23H
X010 0010B
e
22H
X010 0001B
e
21H
X010 0000B
e
20H
Window in Lower Register File: C0H±FFH
Window in Lower Register File: E0H±FFH
3
8XC196KD/8XC196KD20
PROCESS INFORMATION
This device is manufactured on PX29.5 or PX29.9, a
CHMOS III process. Additional process and reliabili-
ty information is available in
the
Intel® Quality
System Handbook:
http://developer.intel.com/design/quality/quality.htm
Table 5. 8XC196KD Memory Map
Description
External Memory or I/O
Internal ROM/OTPROM or External
Memory (Determined by EA)
Reserved. Must contain FFH.
(Note 5)
PTS Vectors
Upper Interrupt Vectors
Address
0FFFFH
0A000H
9FFFH
2080H
207FH
205EH
205DH
2040H
203FH
2030H
202FH
2020H
201FH
201AH
2019H
2018H
2017H
2014H
2013H
2000H
1FFFH
1FFEH
1FFDH
0400H
03FFH
0018H
0017H
0000H
x
x
x
ROM/OTPROM Security Key
Reserved. Must contain FFH.
(Note 5)
Reserved. Must Contain 20H
(Note 5)
CCB
Reserved. Must contain FFH.
(Note 5)
Lower Interrupt Vectors
Port 3 and Port 4
External Memory
1000 Bytes Register RAM (Note 1)
CPU SFR’s (Notes 1, 3)
NOTE:
1. EPROMs are available as One Time Programmable
(OTPROM) only.
Figure 3. The 8XC196KD Family Nomenclature
Table 4. Thermal Characteristics
Package
Type
PLCC
QFP
SQFP
θ
ja
35
°
C/W
56
°
C/W
68
°
C/W
θ
jc
13
°
C/W
12
°
C/W
15.5
°
C/W
All thermal impedance data is approximate for static air
conditions at 1W of power dissipation. Values will change
depending on operation conditions and application. See
the Intel
Packaging Handbook
(order number 240800) for a
description of Intel’s thermal impedance test methodology.
NOTES:
1. Code executed in locations 0000H to 03FFH will be
forced external.
2. Reserved memory locations must contain 0FFH unless
noted.
3. Reserved SFR bit locations must contain 0.
4. Refer to 8XC196KC for SFR descriptions.
5.
WARNING:
Reserved memory locations must not be
written or read. The contents and/or function of these lo-
cations may change with future revisions of the device.
Therefore, a program that relies on one or more of these
locations may not function properly.
4