DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA2756GR
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The
µ
PA2756GR is Dual N-channel MOS Field Effect
Transistor designed for switching applications.
PACKAGE DRAWING (Unit: mm)
8
5
1 : Source 1
2 : Gate 1
7, 8: Drain 1
3 : Source 2
4 : Gate 2
5, 6: Drain 2
6.0 ±0.3
4.4
+0.10
–0.05
FEATURES
•
Low on-state resistance
R
DS(on)1
= 105 mΩ MAX. (V
GS
= 10 V, I
D
= 2.0 A)
R
DS(on)2
= 150 mΩ MAX. (V
GS
= 4.0 V, I
D
= 2.0 A)
•
Low C
iss
: C
iss
= 260 pF TYP.
•
Built-in G-S protection diode against ESD
•
Small and surface mount package (Power SOP8)
1
4
5.37 MAX.
1.44
0.8
1.8 MAX.
0.05 MIN.
ORDERING INFORMATION
PART NUMBER
PACKAGE
Power SOP8
0.15
0.5 ±0.2
0.10
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
µ
PA2756GR
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Note1
Note2
Note1
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T1
P
T2
T
ch
T
stg
60
±20
±4.0
±16
1.6
2.0
150
−55
to +150
4.0
1.6
1.6
V
V
A
A
W
W
°C
°C
A
mJ
mJ
Gate 1
EQUIVALENT CIRCUIT
Drain 1
Drain 2
Drain Current (pulse)
Total Power Dissipation (1 unit)
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note3
Note3
Total Power Dissipation (2 units)
Body
Diode Gate 2
Body
Diode
Gate
Protection
Diode
Source 1
Gate
Protection
Diode
Source 2
I
AS
E
AS
E
AR
Repetitive Avalanche Energy
Notes 1.
2.
3.
4.
Note4
Mounted on ceramic substrate of 2000 mm
2
x 2.2 mm
PW
≤
10
µ
s, Duty Cycle
≤
1%
Starting T
ch
= 25°C, V
DD
= 30 V, R
G
= 25
Ω,
V
GS
= 20
→
0 V
I
AR
≤
4.0 A, T
ch
≤
150°C
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G17407EJ1V0DS00 (1st edition)
Date Published January 2005 NS CP(K)
Printed in Japan
2005
µ
PA2756GR
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Note
Note
SYMBOL
I
DSS
I
GSS
V
GS(off)
| y
fs
|
R
DS(on)1
R
DS(on)2
TEST CONDITIONS
V
DS
= 60 V, V
GS
= 0 V
V
GS
=
±18
V, V
DS
= 0 V
V
DS
= 10 V, I
D
= 1 mA
V
DS
= 10 V, I
D
= 2.0 A
V
GS
= 10 V, I
D
= 2.0 A
V
GS
= 4.0 V, I
D
= 2.0 A
V
DS
= 10 V
V
GS
= 0 V
f = 1 MHz
V
DD
= 30 V, I
D
= 2.0 A
V
GS
= 10 V
R
G
= 10
Ω
MIN.
TYP.
MAX.
10
±10
UNIT
µ
A
µ
A
V
S
1.5
2.0
2.0
2.5
Drain to Source On-state Resistance
85
106
260
65
20
14
5
80
30
105
150
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Note
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
V
DD
= 48 V
V
GS
= 10 V
I
D
= 4.0 A
I
F
= 4.0 A, V
GS
= 0 V
I
F
= 4.0 A, V
GS
= 0 V
di/dt = 100 A/
µ
s
6
1
1.5
0.9
24
22
Note
Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
= 20
→
0 V
50
Ω
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
V
DD
PG.
R
G
V
GS
R
L
V
DD
V
DS
90%
90%
10%
10%
V
GS
Wave Form
0
10%
V
GS
90%
BV
DSS
I
AS
I
D
V
DD
V
DS
V
GS
0
τ
τ
= 1
µ
s
Duty Cycle
≤
1%
V
DS
V
DS
Wave Form
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= 2 mA
PG.
50
Ω
R
L
V
DD
2
Data Sheet G17407EJ1V0DS
µ
PA2756GR
TYPICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
dT - Percentage of Rated Power - %
120
P
T
- Total Power Dissipation - W
100
80
60
40
20
0
0
20
40
60
80
100 120 140 160
T
A
- Ambient Temperature -
°C
FORWARD BIAS SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
2.8
2.4
2
1.6
1.2
0.8
0.4
0
0
20
40
60
80
100 120 140 160
T
A
- Ambient Temperature -
°C
2 units
1 unit
Mounted on ceramic
substrate of
2000 mm
2
x 2.2 mm
100
I
D(pulse)
PW = 100
µs
I
D
- Drain Current - A
10
I
D(DC)
1 ms
1
R
DS(on)
Limited
(at V
GS
= 10 V)
Power Dissipation Limited
Single pulse, 1unit
T
A
= 25°C
Mounted on ceramic substrate
of 2000 mm
2
x 2.2 mm
10 ms
100 ms
0.1
0.01
0.01
0.1
1
10
100
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
r
th(t)
- Transient Thermal Resistance -
°C/W
100
R
th(ch-A)
= 78.1°C/W
10
1
Single pulse, 1unit
T
A
= 25°C
Mounted on ceramic substrate of 2000 mm
2
x 2.2 mm
1m
10 m
100 m
1
10
100
1000
0.1
100
µ
PW - Pulse Width - s
Data Sheet G17407EJ1V0DS
3
µ
PA2756GR
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
20
Pulsed
100
10
V
DS
= 10 V
Pulsed
T
A
=
−40°C
25°C
75°C
125°C
150°C
I
D
- Drain Current - A
15
I
D
- Drain Current - A
1
0.1
0.01
0.001
10
V
GS
= 10 V
5
4.0 V
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
V
DS
- Drain to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
| y
fs
| - Forward Transfer Admittance - S
3
V
GS(off)
- Gate Cut-off Voltage - V
2.5
2
1.5
1
0.5
0
-50 -25
0
25
50
75 100 125 150 175
T
ch
- Channel Temperature -
°C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
V
DS
= 10 V
I
D
= 1 mA
0.0001
0
1
2
3
4
5
V
GS
- Gate to Source Voltage - V
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
10
V
DS
= 10 V
Pulsed
1
T
A
=
−40°C
25°C
75°C
125°C
150°C
0.1
0.01
0.01
0.1
1
10
100
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
R
DS(on)
- Drain to Source On-state Resistance - mΩ
200
Pulsed
180
160
140
120
100
80
60
0.1
1
10
100
I
D
- Drain Current – A
R
DS(on)
- Drain to Source On-state Resistance - mΩ
200
180
160
140
120
100
80
60
0
1
2
3
4
5
6
7
8
9 10 11 12
V
GS
- Gate to Source Voltage - V
Pulsed
I
D
= 4.0 A
2.0 A
0.8 A
V
GS
= 4.0 V
10 V
4
Data Sheet G17407EJ1V0DS
µ
PA2756GR
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
1000
C
iss
, C
oss
, C
rss
- Capacitance - pF
R
DS(on)
- Drain to Source On-state Resistance - mΩ
200
180
160
140
120
100
80
60
40
20
0
-50 -25
0
25
50
75 100 125 150 175
T
ch
- Channel Temperature - °C
SWITCHING CHARACTERISTICS
I
D
= 2.0 A
Pulsed
V
GS
= 4.0 V
C
iss
100
C
oss
10 V
10
V
GS
= 0 V
f = 1 MHz
1
0.1
1
10
C
rss
100
V
DS
- Drain to Source Voltage - V
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
1000
V
DS
- Drain to Source Voltage - V
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
60
12
V
DD
= 48 V
30 V
12 V
10
8
6
V
GS
4
2
0
0
1
2
3
4
5
6
7
Q
G
- Gate Charge - nC
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
V
GS
- Gate to Source Voltage - V
V
DD
= 30 V
V
GS
= 10 V
R
G
= 10
Ω
100
t
d(off)
t
f
10
t
d(on)
t
r
I
D
= 4.0 A
50
40
30
20
10
0
V
DS
1
0.1
1
10
100
I
D
- Drain Current - A
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100
I
F
- Diode Forward Current - A
Pulsed
V
GS
= 10 V
4.0 V
0V
t
rr
- Reverse Recovery Time - ns
1000
V
GS
= 0 V
di/dt = 100 A/µs
100
10
1
10
0.1
0.01
0
0.5
1
1.5
V
F(S-D)
- Source to Drain Voltage - V
1
0.1
1
10
100
I
F
- Diode Forward Current - A
Data Sheet G17407EJ1V0DS
5
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