ISO 9001 CERTIFIED BY DSCC
M.S.KENNEDY CORP.
4707 Dey Road Liverpool, N.Y. 13088
HIGH SPEED/VOLTAGE
OP AMP
1461
(315) 701-6751
FEATURES:
Extremely Fast - 500v/µS
Wide Supply Range ±15V to ±45V
VMOS Output, No Secondary Breakdown
Large Gain-Bandwidth Product
FET Input
Electrically Isolated Case
800mA Typical Output Current
Available as SMD#5962-9050001 HX
MIL-PRF-38534 CERTIFIED
DESCRIPTION:
The MSK 1461 is a state of the art high speed FET input operational amplifier. The distinguishing characteristic of
the MSK 1461 is its unique VMOS output stage which completely eliminates the safe operating area restrictions
associated with secondary breakdown of bipolar transistor output stage op-amps. Freedom from secondary break-
down allows the 1461 to handle large output currents at any voltage level limited only by transistor junction tempera-
ture. 115 dB of open loop gain gives the 1461 high closed loop gain accuracy and the typical ±1.0mV of input offset
voltage will fit well in any error budget. A 500 V/µS slew rate and 1200 MHz gain bandwidth product make the 1461
an outstanding high-speed op-amp. A single external capacitor is used for compensation and output current limiting
is user programmable through the selection of two external resistors.
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
Video Yoke Drivers
Video Distribution Amplifiers
High Accuracy Audio Amplification
High Speed ATE Pin Drivers
1
2
3
4
5
6
7
1
PIN-OUT INFORMATION
Inverting Input
Non-Inverting Input
No Connection
No Connection
Negative Power Supply
Negative Current Limit
No Connection
14
13
12
11
10
9
8
Offset Adjust
Offset Adjust
Compensation
Compensation
Positive Power Supply
Positive Current Limit
Output
Rev. C 6/02
ABSOLUTE MAXIMUM RATINGS
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ELECTRICAL SPECIFICATIONS
Parameter
STATIC
Supply Voltage Range
3
Quiescent Current
Thermal Resistance
INPUT
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Adjust
3
Input Bias Current
Input Offset Current
3
Input Impedance
3
Common Mode Range
3
Common Mode Rejection Ratio
3
OUTPUT
Output Voltage Swing
Output Current, Peak
Settling Time
2 3
TRANSFER CHARACTERISTICS
Slew Rate
Open Loop Voltage Gain
3
Gain Bandwidth Product
3
V
OUT
=±10V R
L
=1KΩ
R
L
=10KΩ F=100Hz
F=100KHz
4
4
4
200
90
800
500
106
1200
-
-
-
200
90
800
500
106
1200
-
-
-
V/µS
dB
MHz
R
L
=50Ω
R
L
=1KΩ
R
L
=33Ω T
J
<175°C
0.1% 10V step
4
4
4
4
±27
±30
-
±31
±33
400
-
-
-
800
±27
±30
-
±31
±33
400
-
-
-
800
V
V
mA
nS
F=10KHz V
CM
=±22V
V
IN
=0V A
V
=-10V/V
Bal. Pins=N/C
R
POT
=10KΩ to +V
CC
V
CM
=0V
Either Input
V
CM
=0V
F=DC
1
2,3
-
1
2,3
-
-
-
-
4
-
-
-
-
-
-
-
-
±22
90
±1.0 ±5.0
±6.0
±8.0
±50
-
-
-
-
-
-
-
-
-
±22
90
±1.0 ±8.0
±10
±8.0
-
±5.0
-
3x10
12
±24
100
-
-
-
-
-
-
-
-
mV
µV/°C
V
pA
nA
pA
nA
Ω
V
dB
3
Test Conditions
Group A
Subgroup
MSK 1461B/E
Min.
±15
-
-
-
Typ.
-
±19
±21
15
Max.
±45
±25
±35
16
MSK 1461
Min.
±15
-
-
-
Typ.
-
±19
-
15
Max.
±45
±28
-
18
-
V
IN
=0V
Junction to Case @ 125°C
1
2,3
-
±10 ±300
±10 ±100
±5.0
±5.0
3x10
12
±24
100
-
-
-
-
-
±10 ±300
±600 ±800
±600 ±800
NOTES:
1
2
3
4
5
6
7
R
SC
=0Ω and ±V
CC
=36VDC unless otherwise specified.
AV=-1, measured in false summing junction circuit.
Guaranteed by design but not tested. Typicalparameters are representative of actual device performance but are for reference only.
Industrial grade and "E" suffix devices shall be tested to subgroups 1 and 4 unless otherwise specified.
Military grade devices ("B" suffix) shall be 100% tested to subgroups 1,2,3 and 4.
Subgroups 5 and 6 testing available upon request.
Subgroup 1,4 T
C
=+25°C
Subgroup 2,5 T
J
=+125°C
Subgroup 3,6 T
A
=-55°C
2
Rev. C 6/02
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±V
CC
I
OUT
V
IN
T
ST
Supply Voltage
Output Current
Differential Input Voltage
Storage Temperature Range
±45V
800mA
±25V
-65°C to +150°C
T
LD
Lead Temperature Range
(10 Seconds)
T
C
Case Operating Temperature
(MSK 1461B/E)
(MSK 1461)
T
J
Junction Temperature
300°C
-55°C to +125°C
-40°C to 85°C
+175°C
Units
V
mA
mA
°C/W
APPLICATION NOTES
HEAT SINKING
To select the correct heat sink for your application,
refer to the thermal model and governing equation below.
The output current of the MSK 1461 is internally lim-
ited to approximately ±750mA by two 0.8Ω internal cur-
rent limit resistors. Additional current limit can be achieved
through the use of two external current limit resistors.
One resistor (+R
SC
) limits the positive output current and
the other (-R
SC
) limits the negative output current. The
value of the current limit resistors can be determined as
follows:
±R
SC
= [(0.65V/±I
LIM
) - 0.8Ω]
Since the 0.65V term is obtained from the base to
emitter voltage drop of a bipolar transistor, the equation
only holds true for +25°C operation. As case tempera-
ture increases, the 0.65V term will decrease making the
actual current limit set point decrease slightly.
CURRENT LIMIT
Thermal Model:
Governing Equation:
T
J
=P
D
x (R
θJC
+ R
θCS
+ R
θSA
) + T
A
Where
T
J
= Junction Temperature
P
D
= Total Power Dissipation
R
θJC
= Junction to Case Thermal Resistance
R
θCS
= Case to Heat Sink Thermal Resistance
R
θSA
= Heat Sink to Ambient Thermal Resistance
T
C
= Case Temperature
T
A
= Ambient Temperature
T
S
= Sink Temperature
The following schematic illustrates how to connect
each current limit resistor:
INPUT OFFSET ADJUST CONNECTION
IN
Both the negative and the positive power supplies must
be effectively decoupled with a high and low frequency
bypass circuit to avoid power supply induced oscillation.
An effective decoupling scheme consists of a 0.1µF ce-
ramic capacitor in parallel with a 4.7µF tantalum capaci-
tor from each power supply pin to ground.
Example:
In our example the amplifier application requires the
output to drive a 20 volt peak sine wave across a 400Ω
load for 50mA of peak output current. For a worst case
analysis we will treat the 50mA peak output current as a
D.C. output current. The power supplies shall be set to
±40VDC.
POWER SUPPLY BYPASSING
Any designer who has worked with power operational
1.) Find Driver Power Dissipation
amplifiers is familiar with Safe Operating Area (S.O.A.)
P
D
= [(quiescent current) x (+V
S
- (-V
S
))] +
curves. S.O.A. curves are a graphical representation of
[(+V
S
-V
O
) x I
OUT
]
the following three power limiting factors of any bipolar
= [(50mA) x (80V)] + [(20V) x (0.05A)]
transistor output op-amp.
= 4W + 1.0W
1. Wire Bond Current Carrying Capability
= 5Watts
2. Transistor Junction Temperature
2.) For conservative design, set T
J
=+125°C.
3. Secondary Breakdown Limitations
3.) For this example, T
A
=+25°C
Since the MSK 1461 utilizes a MOSFET output, there
4.) R
θJC
= 16°C/W from MSK 1461B Data Sheet
are no secondary breakdown limitations and therefore no
5.) R
θCS
= 0.15°C/W for most thermal greases
6.) Rearrange governing equation to solve for R
θSA
need for S.O.A. curves. The only limitation on output
R
θSA
= ((T
J
- T
A
)/P
D
) - (R
θJC
) - (R
θCS
)
power is the junction temperature of the output drive tran-
= ((125°C - 25°C) / 5W) - (16°C/W) - (0.15°C/W)
sistors.
≅
3.85°C/W
Whenever possible, junction temperature should be kept
below 150°C to ensure high reliability. See "Heat Sink-
The heat sink in this example must have a thermal
ing" for more information involving junction temperature
resistance of no more than 3.85°C/W to maintain a junction
calculations.
temperature of no more than +125°C
.
Rev. C 6/02
3
SAFE OPERATING AREA
微控制器 MCU
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