REVISIONS
LTR
A
B
C
DESCRIPTION
Changes in accordance with NOR 5962-R100-97. – CFS
Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. –
LTG
Add device types 02 and 03. Add test circuit to figure 4. Update boilerplate
and editorial changes throughout. - LTG
Correct radiation features in section 1.5 and add footnote 7/ and 8/. Correct
footnotes 2/ and 7/ in table IA. Correct SEP test limit in the table IB. Update
boilerplate paragraphs to current requirements of MIL-PRF-38535. - MAA
Update radiation features. Change RHA level H to G of device type 01 in
section 1.5 and SEP test limits table IB. Correct output voltage (Vol and Voh)
test condition in table IA.and SEP test limits. - jak
DATE (YR-MO-DA)
96-11-18
01-11-01
04-05-26
APPROVED
Monica L. Poelking
Thomas M. Hess
Thomas M. Hess
D
09-10-05
Thomas M. Hess
E
11-03-09
David Corbett
F
Add footnote 5 to figure 4. Add equivalent test circuit to figure 4. - jak
12-08-01
Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
F
15
F
16
F
17
F
18
REV
SHEET
F
19
F
20
F
21
F
1
F
22
F
2
F
23
F
3
F
24
F
4
F
25
F
5
F
26
F
6
F
27
F
7
F
8
F
9
F
10
F
11
F
12
F
13
F
14
PREPARED BY
Thanh V. Nguyen
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
CHECKED BY
Thanh V. Nguyen
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
APPROVED BY
Monica L. Poelking
DRAWING APPROVAL DATE
96-07-16
REVISION LEVEL
MICROCIRCUIT, DIGITAL, ADVANCED CMOS,
RADIATION HARDENED, 8-BIT SERIAL / PARALLEL-IN,
SERIAL-OUT SHIFT REGISTER, MONOLITHIC SILICON
SIZE
CAGE CODE
F
AMSC N/A
A
67268
SHEET
1
5962-96558
OF
27
DSCC FORM 2233
APR 97
5962-E398-12
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q ) and
space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
Federal
stock class
designator
\
G
RHA
designator
(see 1.2.1)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
Generic number
54ACS165
Circuit function
Radiation hardened, 8-bit serial/parallel-in,
serial-out shift register
Enhanced, radiation hardened, 8-bit serial/
parallel-in, serial-out shift register
Enhanced, radiation hardened, 8-bit serial/
parallel-in, serial-out shift register
96558
01
Device
type
(see 1.2.2)
/
V
Device
class
designator
(see 1.2.3)
X
Case
outline
(see 1.2.4)
C
Lead
finish
(see 1.2.5)
02
54ACS165E
03
54ACS165E
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Q or V
Device requirements documentation
Certification and qualification to MIL-PRF-38535
1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:
Outline letter
E
X
Descriptive designator
GDIP1-T16 or CDIP2-T16
CDFP4-F16 16
Terminals
16
16
Package style
Dual-in-line
Flat pack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-96558
SHEET
F
2
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage range (V
DD
) .................................................................................. -0.3 V dc to +7.0 V dc
DC input voltage range (V
IN
) ................................................................................ -0.3 V dc to V
DD
+ 0.3 V dc
DC output voltage range (V
OUT
) ........................................................................... -0.3 V dc to V
DD
+ 0.3 V dc
DC input current, any one input (I
IN
).....................................................................
±10
mA
Latch-up immunity current (I
LU
) ............................................................................
±150
mA
Storage temperature range (T
STG
) ....................................................................... -65°C to +150°C
Lead temperature (soldering, 5 seconds) ............................................................ +300°C
Thermal resistance, junction-to-case (θ
JC
):
Case outlines E and X (device type 01) ............................................................. See MIL-STD-1835
Case outline X (device types 02 and 03) ........................................................... 15°C/W
Junction temperature (T
J
) .................................................................................... +175°C
Maximum package power dissipation (P
D
):
Device type 01 ................................................................................................... 1.0 W
Device types 02 and 03 ..................................................................................... 3.2 W 4/
1.4 Recommended operating conditions. 2/ 3/
Supply voltage range (V
DD
):
Device type 01 .................................................................................................. +4.5 V dc to +5.5 V dc
Device types 02 and 03 .................................................................................... +3.0 V dc to +5.5 V dc
Input voltage range (V
IN
) ...................................................................................... +0.0 V dc to V
DD
Output voltage range (V
OUT
)................................................................................. +0.0 V dc to V
DD
Case operating temperature range (T
C
) ............................................................... -55°C to +125°C
Maximum input rise and fall time at V
DD
= 4.5 V (t
r
, t
f
).......................................... 1 ns/V 5/
1.5 Radiation features.
Maximum total dose available:
Device type 01 (dose rate = 50 – 300 rads (Si)/s) ............................................ 5 x 10
5
Rad (Si) 6/
Device type 02 (effective dose rate = 1rad (Si)/s) ............................................ 1 x 10
6
Rad (Si) 7/
Device type 03 (dose rate = 50 – 300 rads (Si)/s) ............................................ 5 x 10
5
Rads (Si) 6/
Single event phenomenon (SEP) effective:
Device type 01:
Device type 01:
No SEU occurs at effective LET (see 4.4.4.4) .................................................≤ 80 MeV/(mg/cm
2
) 8/ 9/
No SEL occurs at effective LET (see 4.4.4.4)..................................................≤ 120 MeV/(mg/cm
2
) 8/ 9/
Device types 02 and 03:
No SEU occurs at effective LET (see 4.4.4.4) .................................................≤108 MeV/(mg/cm
2
) 8/ 9/
No SEL occurs at effective LET (see 4.4.4.4).................................................. ≤ 120 MeV/(mg/cm
2
) 8/ 9/
Dose rate upset (20 ns pulse) (device types 01, 02 and 03) ............................... ≥ 1 x 10
9
Rads (Si)/s 8/ 10/
Dose rate induced latch-up .................................................................................
None 8/
Dose rate survivability (device types 01, 02 and 03) ........................................... ≥ 1 x 10
12
Rads (Si)/s 8/
1/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum
levels may degrade performance and affect reliability.
2/ Unless otherwise specified, all voltages are referenced to V
SS
.
3/ The limits for the parameters specified herein shall apply over the full specified V
DD
range and case temperature range
of -55°C to +125°C unless otherwise specified.
4/ Per MIL-STD-883 method 1012.1 section 3.4.1, P
D
(Package) = (T
J
(max) - T
C
(max)) .
θ
JC
5/ Derate system propagation delays by difference in rise time to switch point for t
r
or t
f
> 1 ns/V.
6/ Device types 01 and 03 are tested in accordance with MIL-STD-883, method 1019, condition A.
7/ Device type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is
guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s per
MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified
effective dose rate, or lower, environment.
8/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order
or contract.
9/ Radiation testing is performed on the standard evaluation circuit.
10/ This limit is applicable for device types 01, 02, 03 with V
DD
≥ 4.5 V. Device types 02 and 03 do not meet this limit at V
DD
< 4.5 V.
SIZE
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
A
REVISION LEVEL
5962-96558
SHEET
F
3
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks
form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
https://assist.dla.mil/quicksearch/
or from the Standardization Document
Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.
ASTM INTERNATIONAL (ASTM)
ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion
Irradiation of semiconductor Devices.
(Copies of these documents are available online at
http://www.astm.org/
or from ASTM International, 100 Barr Harbor Drive,
P.O. Box C700, West Conshohocken, PA, 19428-2959).
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-96558
SHEET
F
4
3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing and acquiring activity upon request.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the
full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The
electrical tests for each subgroup are described in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance
submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the
manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535,
appendix A shall be provided with each lot of microcircuits delivered to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-96558
SHEET
F
5
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