Ordering number : ENA2006
LC877G16A
CMOS IC
16K-byte ROM and 512-byte RAM
8-bit 1-chip Microcontroller
Overview
http://onsemi.com
The LC877G16A is an 8-bit microcontroller that, centered around a CPU running at a minimum bus cycle time of
200ns, integrates on a single chip a number of hardware features such as 16K-byte ROM, 512-byte RAM, an LCD
controller/driver, a sophisticated 16-bit timer/counter (may be divided into 8-bit timers), two 8-bit timers with a
prescaler, a 16-bit timer with a prescaler (may be divided into 8-bit timers), a UART interface (full duplex), infrared
remote control receive function, and general-purpose I/O circuits.
Features
ROM
•
16384
×
8 bits
RAM
•
512
×
9 bits
Minimum
Bus Cycle Time
•
200ns (5MHz) VDD=2.7 to 5.5V
Note: The bus cycle time here refers to ROM read speed.
Minimum
Instruction Cycle Time (tCYC)
•
600ns (5MHz) VDD=2.7 to 5.5V
Operating
Temperature Range
•
-40°C to +85°C
Semiconductor Components Industries, LLC, 2013
May, 2013
Ver.1.00
30712HKIM 20120119-S00007 No.A2006-1/17
LC877G16A
Ports
•
Normal withstand voltage I/O ports
Ports whose I/O direction can be designated in 1-bit units:
•
Normal withstand voltage input port
•
LCD ports
Segment output:
Common output:
Bias power supply for LCD driving:
Multiplexed pin functions
Input/output ports:
•
Dedicated oscillator ports
•
Reset pin
•
Power pins
LCD
Controller
(1) Display duty: 1/3duty, 1/4duty
(2) Display bias: 1/2bias, 1/3bias
UART
•
Full duplex
•
7/8/9 bits data bit selectable
•
1 stop bit (2-bit in continuous data transmission)
•
Built-in baudrate generator
•
Maximum transfer rate: 200kbps (5MHz)
Timers
•
Timer 0: 16-bit timer/counter with a capture register
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)
×
2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)
+ 8-bit counter (with an 8-bit capture registers)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register)
Mode 3: 16-bit counter (with a 16-bit capture register)
•
Timer 4: 8-bit timer with a 6-bit prescaler
•
Timer 5: 8-bit timer with a 6-bit prescaler
•
Timer 8: 16-bit timer
Mode 0: 8-bit timer with an 8-bit prescaler
×
2 channels
Mode 1: 16-bit timer with an 8-bit prescaler
•
Base Timer
1) The clock can be selected from the system clock and timer 0 prescaler output.
2) An interrupt can be generated at five different time intervals.
13 (2 for UART, 1 for remote control, and 10 for
key-scan signal I/O)
1 (XT1)
74 (S00 to S73)
4 (COM0 to COM3)
3 (V1 to V3)
8 (P1n)
2 (CF1, CF2)
1 (RES)
2 (VDD1, VSS1)
No.A2006-2/17
LC877G16A
Infrared
Remote Control Receiver Circuit 1
1) Noise rejection function
2) Supports receive formats with a guide-pulse of half-clock/clock/none.
3) Determines an end of receive by detecting a no-signal period (no carrier).
(Supports same receive format with a different bit length.)
High-speed
Multiplication/Division Instructions
•
16 bits
×
8 bits
(5 tCYC execution time)
•
24 bits
×
16 bits
(12 tCYC execution time)
•
16 bits
÷
8 bits
(8 tCYC execution time)
•
24 bits
÷
16 bits
(12 tCYC execution time)
Interrupts
•
14 sources, 8 vectors
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt request of
the level equal to or lower than the current interrupt is not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, an interrupt into the smallest vector
address is given priority.
No.
1
2
3
4
5
6
7
8
9
10
0004BH
H or L
Port 0/T4/T5
00033H
0003BH
H or L
H or L
UART receive/T8L/T8H
UART transmit
Vector Address
00003H
0000BH
00013H
0001BH
00023H
Level
X or L
X or L
H or L
H or L
H or L
INT0
INT1
T0L/remote control receiver1
INT3/base timer
T0H
Interrupt Source
•
Priority levels: X > H > L
•
When interrupts of the same level occur at the same time, an interrupt with the smallest vector address is given
priority.
Subroutine
Stack Levels
•
Up to 256 levels mum (stack is allocated in RAM)
Oscillator
Circuits
•
RC oscillator circuit (internal): For system clock
•
CF oscillator circuit: For system clock, with internal Rf, and external Rd
System Clock Divider Function
•
Can run on low current.
•
The minimum instruction cycle can be selected from among 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs, and
76.8μs (at a main clock rate of 5MHz).
No.A2006-3/17
LC877G16A
Standby
Function
•
HALT mode: HALT mode is used to minimize power dissipation of the IC.
Halts instruction execution while allowing the peripheral circuits to continue operation.
(Some serial transfer functions are suspended.)
1) Oscillators do not stop automatically.
2) Released by a system reset or occurrence of an interrupt.
•
HOLD mode: HOLD mode is used to minimize power dissipation of the IC.
Suspends instruction execution and operation of the peripheral circuits.
1) The CF and RC oscillators automatically stop operation.
2) There are three ways of releasing HOLD mode.
(1) Setting the reset pin to a low level
(2) Setting at least one of the INT0, INT1, and INT3 pins to the specified level
(3) Establishing an interrupt source at port 0
Package
Form
• ΤQFP100
(14×14)
“Lead-free and halogen-free product”
Development
Tools
•
On-chip debugger: TCB87-Type B + LC87D7G16A
TCB87-Type C (3-wire cable) + LC87D7G16A
No.A2006-4/17
LC877G16A
Package Dimensions
unit : mm (typ)
3274
16.0
14.0
75
76
51
50
100
1
(1.0)
(1.0)
26
0.5
0.2
25
0.125
1.2max
0.1
SANYO : TQFP100(14X14)
Pin Assignment
S68
S67
S66
S65
S64
S63
S62
S61
S60
S59
S58
S57
S56
S55
S54
S53
S52
S51
S50
S49
S48
S47
S46
S45
S44
S69
S70
S71
S72
S73
COM0
COM1
COM2
COM3
V3
V2
V1
P70/INT0/T0LCP
P71/INT1/T0HCP
P00
P01
P02
P03
P04
P05
P06
P07
RMIN/P73/INT3/T0IN
UTX/P34
URX/P35
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
14.0
16.0
0.5
LC877G16A
S43
S42
S41
S40
S39
S38
S37
S36
S35
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21
S20
S19
RES
XT1
VSS1
CF1
CF2
VDD1
S0/P10
S1/P11
S2/P12
S3/P13
S4/P14
S5/P15
S6/P16
S7/P17
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Top view
ΤQFP100
(14×14) “Lead-free and halogen-free product”
No.A2006-5/17
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