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SSLDL-LVQ-35G

产品描述Active Delay Line, 1-Func, 1-Tap, True Output, Hybrid, GULLWING, MODULE-8/4
产品类别逻辑    逻辑   
文件大小144KB,共2页
制造商Engineered Components Co
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SSLDL-LVQ-35G概述

Active Delay Line, 1-Func, 1-Tap, True Output, Hybrid, GULLWING, MODULE-8/4

SSLDL-LVQ-35G规格参数

参数名称属性值
零件包装代码SOIC
包装说明SOP, GWDIP4/8,.5
针数4
Reach Compliance Codeunknown
JESD-30 代码R-XDSO-G4
长度12.7 mm
逻辑集成电路类型ACTIVE DELAY LINE
功能数量1
抽头/阶步数1
端子数量4
最高工作温度85 °C
最低工作温度-40 °C
输出极性TRUE
封装主体材料UNSPECIFIED
封装代码SOP
封装等效代码GWDIP4/8,.5
封装形状RECTANGULAR
封装形式SMALL OUTLINE
电源3/3.3 V
可编程延迟线NO
Prop。Delay @ Nom-Sup36.5 ns
认证状态Not Qualified
座面最大高度8.255 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2.7 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术HYBRID
温度等级INDUSTRIAL
端子形式GULL WING
端子节距2.54 mm
端子位置DUAL
总延迟标称(td)35 ns
宽度9.525 mm
Base Number Matches1

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T2L LV CMOS input and output
Delay stable and precise
8-pin Space Saver package
Leads - thru-hole, J, Gull Wing or Tucked
Available in delays from 6 to 150ns
Fast rise time on output
12mA output drive capability
Delay time is measured at the +1.5V level on the leading edge.
Output is capable of driving ±12mA. Temperature coefficient
of delay is approximately +1200 ppm/
o
C over the operating
temperature range of -40 to +85
o
C.
These modules accept either logic "1" or logic "0" inputs and
reproduce the logic at the output without inversion. The delay
modules are intended primarily for use with positive going
pulses and are calibrated to the tolerances shown in the table
on rising edge delay; where best accuracy is desired in appli-
cations using falling edge timing, it is recommended that a
special unit be calibrated for the specific application.
These LVQ "Space Saver Series" modules are packaged in
an 8-pin housing, molded of flame-proof Diallyl Phthalate per
MIL-M-14, Type SDG-F, and are fully encapsulated in epoxy
resin. Thru-hole, J, Gull Wing or Tucked Lead configurations
are available on these modules (see Part Number Table note
to specify). Leads meet the solderability requirements of MIL-
STD-202, Method 208. Corner standoffs on the housing of the
thru-hole lead version and lead design of the surface mount
versions provide positive standoff from the printed circuit
board to permit solder-fillet formation and flush cleaning of
solder-flux residues for improved reliability.
Marking consists of manufacturer's name, logo (EC2), part
number, terminal identification and date code of manufacture.
All marking is applied by silk screen process using white epoxy
paint in accordance with MIL-STD-130, to meet the perma-
nency of identification required by MIL-STD-202, Method 215.
design notes
The LVQ "Space Saver Series" Logic Delay Lines developed by
Engineered Components Company have been designed to provide
precise delays with required driving and pick-off circuitry contained
in a single 8-pin package compatible with low voltage (3.3V) & T2L
circuits. These logic delay lines are of hybrid construction utilizing
the proven technologies of active integrated circuitry and of passive
networks utilizing capacitive, inductive and resistive elements. The
MTBF on these modules, when calculated per MIL-HDBK-217 for
a 50
o
C ground fixed environment, is in excess of 4 million hours.
Module design includes compensation for propagation delays and
incorporates internal termination at the output; no additional exter-
nal components are needed to obtain the specified delay.
The SSLDL-LVQ is offered in 37 delays from 6 to 150ns. Delay
tolerances are maintained as shown in the accompanying part
number table, when tested under the "Test Conditions" shown.

 
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