74LVT162245 • 74LVTH162245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25: Series Resistors in
A Port Outputs
January 1999
Revised June 2005
74LVT162245 • 74LVTH162245
Low Voltage 16-Bit Transceiver with 3-STATE Outputs
and 25: Series Resistors in A Port Outputs
General Description
The LVT162245 and LVTH162245 contains sixteen non-
inverting bidirectional buffers with 3-STATE outputs and is
intended for bus oriented applications. The device is byte
controlled. Each byte has separate control inputs which
can be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
The LVT162245 and LVTH162245 are designed with
equivalent 25
:
series resistance in both the HIGH and
LOW states on the A Port outputs. This design reduces line
noise in applications such as memory address drivers,
clock drivers, and bus transceivers/transmitters.
The LVTH162245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low volt-
age (3.3V) V
CC
applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The LVT162245
and LVTH162245 are fabricated with an advanced
BiCMOS technology to achieve high speed operation simi-
lar to 5V ABT while maintaining a low power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH162245),
also available without bushold feature (74LVT162245).
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides glitch-free
bus loading
s
A Port outputs include equivalent series resistance of
25
:
making external termination resistors unnecessary
and reducing overshoot and undershoot
s
A Port outputs source/sink
r
12 mA.
B Port outputs source/sink
32 mA/
64 mA
s
Functionally compatible with the 74 series 162245
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human-body model
!
2000V
Machine model
!
200V
Charged-device model
!
1000V
s
Also packaged in plastic Fine Pitch Ball Grid Array
(FBGA)
Ordering Code:
Order Number
74LVT162245G
(Note 1)(Note 2)
74LVT162245MEA
(Note 2)
74LVT162245MTD
(Note 2)
74LVTH162245G
(Note 1)(Note 2)
74LVTH162245MEA
74LVTH162245MEX
74LVTH162245MTD
74LVTH162245MTX
Package Number
BGA54A
(Preliminary)
MS48A
MTD48
BGA54A
MS48A
MS48A
MTD48
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TUBE]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBE]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1:
Ordering code “G” indicates Trays.
Note 2:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2005 Fairchild Semiconductor Corporation
DS012446
www.fairchildsemi.com
74LVT162245 • 74LVTH162245
Absolute Maximum Ratings
(Note 3)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Parameter
Supply Voltage
DC Input Voltage
Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
Conditions
Units
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 4)
V
I
GND
V
O
GND
V
O
!
V
CC
V
O
!
V
CC
Output at HIGH State
Output at LOW State
V
mA
mA
mA
mA
mA
0.5 to
4.6
0.5 to
7.0
0.5 to
7.0
0.5 to
7.0
50
50
64
128
r
64
r
128
65 to
150
q
C
Recommended Operating Conditions
Symbol
V
CC
V
I
I
OH
I
OL
T
A
Supply Voltage
Input Voltage
HIGH-Level Output Current
LOW-Level Output Current
Free Air Operating Temperature
Input Edge Rate, V
IN
0.8V–2.0V, V
CC
3.0V
B Port
A Port
B Port
A Port
Parameter
Min
2.7
0
Max
3.6
5.5
Units
V
V
mA
mA
32
12
64
12
40
0
85
10
q
C
ns/V
'
t/
'
V
Note 3:
Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 4:
I
O
Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol
V
IK
V
IH
V
IL
V
OH
Parameter
Input Clamp Diode Voltage
Input HIGH Voltage
Input LOW Voltage
Output HIGH Voltage
A Port
V
CC
(V)
2.7
2.7–3.6
2.7–3.6
3.0
2.7–3.6
2.7
3.0
3.0
2.7
2.7
B Port
3.0
3.0
3.0
I
I(HOLD)
(Note 5)
I
I(OD)
(Note 5)
I
I
Bushold Input Over-Drive
Current to Change State
Input Current
Control Pins
Data Pins
I
OFF
Power Off Leakage Current
Bushold Input Minimum Drive
3.0
3.0
3.6
3.6
3.6
0
75
2.0
V
CC
0.2
2.4
2.0
0.8
0.2
0.5
0.4
0.5
0.55
V
2.0
0.8
T
A
40
q
C to
85
q
C
Max
Min
Units
V
V
V
V
V
V
V
V
I
I
Conditions
1.2
18 mA
V
O
d
0.1V or
V
O
t
V
CC
0.1V
I
OH
I
OH
I
OH
I
OH
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
V
I
V
I
12 mA
100
P
A
8 mA
32 mA
12 mA
100
P
A
24 mA
16 mA
32 mA
64 mA
0.8V
2.0V
B Port
V
OL
Output LOW Voltage
A Port
75
500
P
A
P
A
10
(Note 6)
(Note 7)
V
I
5.5V
0V or V
CC
0V
V
CC
V
I
V
I
V
I
500
r
1
5
1
P
A
r
100
P
A
0V
d
V
I
or V
O
d
5.5V
www.fairchildsemi.com
4
74LVT162245 • 74LVTH162245
DC Electrical Characteristics
Symbol
I
PU/PD
I
OZL
I
OZL
(Note 5)
I
OZH
I
OZH
(Note 5)
I
OZH
I
CCH
I
CCL
I
CCZ
I
CCZ
3-STATE Output Leakage Current
Power Supply Current
Power Supply Current
Power Supply Current
Power Supply Current
Increase in Power Supply Current
(Note 8)
Note 5:
Applies to Bushold versions only (74LVTH162245).
(Continued)
V
CC
(V)
T
A
Parameter
Power Up/Down
3-STATE Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
40
q
C to
85
q
C
Max
Units
Conditions
V
O
V
I
V
O
V
O
V
O
V
O
0.5V to 3.0V
GND to V
CC
0.5V
0.0V
3.0V
3.6V
Min
0–1.5V
3.6
3.6
3.6
3.6
3.6
3.6
3.6
3.6
3.6
3.6
r
100
5
5
5
5
10
0.19
5
0.19
0.19
0.2
P
A
P
A
P
A
P
A
P
A
P
A
mA
mA
mA
mA
mA
V
CC
V
O
d
5.5V
Outputs HIGH
Outputs LOW
Outputs Disabled
V
CC
d
V
O
d
5.5V,
Outputs Disabled
One Input at V
CC
0.6V
Other Inputs at V
CC
or GND
'
I
CC
Note 6:
An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7:
An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8:
This is the increase in supply current for each input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics
Symbol
V
OLP
V
OLV
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
V
CC
(V)
3.3
3.3
(Note 9)
T
A
25
q
C
Typ
0.8
Max
Units
V
V
Conditions
C
L
50 pF, R
L
(Note 10)
(Note 10)
500
:
Min
0.8
Note 9:
Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10:
Max number of outputs defined as (n). n
1 data inputs are driven 0V to 3V. Output under test held LOW.
5
www.fairchildsemi.com
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
