INTEGRATED CIRCUITS
SA5217
Postamplifier with link status indicator
Product specification
Replaces datasheet NE/SA5217 of 1995 Apr 26
IC19 Data Handbook
1998 Oct 07
Philips
Semiconductors
Philips Semiconductors
Product specification
Postamplifier with link status indicator
SA5217
DESCRIPTION
The SA5217 is a 75MHz postamplifier system designed to accept
low level high-speed signals. These signals are converted into a
TTL level at the output. The SA5217 can be DC coupled with the
previous transimpedance stage using SA5210, SA5211 or SA5212A
transimpedance amplifiers. The main difference between the
SA5217 and the SA5214 is that the SA5217 does not make the
output of A1 and input of A2 accessible; instead, it brings out the
output of A2 and the input of A8 thus activating the on-chip Schmitt
trigger function by connecting two external capacitors. The result is
that a much longer string of 1s and 0s, in the bit stream, can be
tolerated. This ”system on a chip” features an auto-zeroed first
stage with noise shaping, a symmetrical limiting second stage, and a
matched rise/fall time TTL output buffer. The system is
user-configurable to provide adjustable input threshold and
hysteresis. The threshold capability allows the user to maximize
signal-to-noise ratio, thereby insuring a low Bit Error Rate (BER).
An auto-zero loop can be used to replace two input coupling
capacitors with a single Auto Zero (AZ) capacitor. A signal absent
flag indicates when signals are below threshold. The low signal
condition forces the TTL output to the last logic state. User
interaction with this ”jamming” system is available. The SA5217 is
packaged in a standard 20-pin surface-mount package and typically
consumes 40mA from a standard 5V supply. The SA5217 is
designed as a companion to the SA5211/5212A and SA5210
transimpedance amplifiers. These differential preamplifiers may be
directly coupled to the postamplifier inputs. The SA5210/5217,
SA5211/5217 or SA5212A/5217 combinations convert nanoamps of
photodetector current into standard digital TTL levels.
PIN CONFIGURATION
D
1
Package
LED
C
PKDET
THRESH
GND
A
FLAG
JAM
V
CCD
V
CCA
GND
D
V
OUT
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
IN
1B
IN
1A
C
AZP
C
AZN
OUT
2B
IN
8B
OUT
2A
IN
8A
R
HYST
R
PKDET
NOTE:
1. SOL - Released in large SO package only.
SD00354
Figure 1. Pin Configuration
FEATURES
APPLICATIONS
•
Fiber optics
•
Communication links in Industrial and/or Telecom environment
with high EMI/RFI
•
Local Area Networks (LAN)
•
Synchronous Optical Networks (SONET) STS-1
•
RF limiter
•
Good for 223 -1 pseudo random bit stream
•
Postamp for the SA5211/5212A. SA5210 preamplifier family
•
Wideband operation: typical 75MHz (150MBaud NRZ)
•
Interstage filtering/equalization possible
•
Single 5V supply
•
Low signal flag
•
Output disable
•
Link status threshold and hysteresis programmable
•
LED driver (normally ON with above threshold signal)
•
Fully differential for excellent PSRR
•
Auto-zero loop for DC offset cancellation
•
2kV ElectroStatic Discharge (ESD) protection
TEMPERATURE RANGE
-40 to +85°C
ORDER CODE
SA5217D
DWG #
SOT163-1
ORDERING INFORMATION
DESCRIPTION
20-Pin Plastic Small Outline Large (SOL) Package
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CCA
V
CCD
T
A
T
J
T
STG
P
D
V
IJ
Power supply
Power supply
Operating ambient temperature range
Operating junction temperature range
Storage temperature range
Power dissipation
Jam input voltage
PARAMETER
SA5214
+6
+6
-40 to +85
-55 to +150
-65 to +150
1.4
-0.5 to 5.5
UNIT
V
V
°C
°C
°C
W
V
1998 Oct 07
2
853-1658 20141
Philips Semiconductors
Product specification
Postamplifier with link status indicator
SA5217
PIN DESCRIPTIONS
PIN
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SYMBOL
LED
C
PKDET
THRESH
GND
A
FLAG
JAM
V
CCD
V
CCA
GND
D
V
OUT
R
PKDET
R
HYST
IN
8A
OUT
2A
IN
8B
OUT
2B
C
AZN
C
AZP
IN
1A
IN
1B
DESCRIPTION
Output for the LED driver. Open collector output transistor with 125Ω series limiting resistor. An above threshold signal
turns this transistor ON.
Capacitor for the peak detector. The value of this capacitor determines the detector response time to the signal, supple-
menting the internal 10pF capacitor.
Peak detector threshold resistor. The value of this resistor determines the threshold level of the peak detector.
Device analog ground pin.
Peak detector digital output. When this output is LOW, there is data present above the threshold. This pin is normally
connected to the JAM pin and has a TTL fanout of two.
Input to inhibit data flow. Sending the pin HIGH forces TTL DATA OUT ON, Pin 10, LOW. This pin is normally connected
to the FLAG pin and is TTL-compatible.
Power supply pin for the digital portion of the chip.
Power supply pin for the analog portion of the chip.
Device digital ground pin.
TTL output pin with a fanout of five.
Peak detector current resistor. The value of this resistor determines the amount of discharge current available to the
peak detector capacitor, C
PKDET
.
Peak detector hysteresis resistor. The value of this resistor determines the amount of hysteresis in the peak detector.
Non-inverting input to amplifier A8.
Non-inverting output of amplifier A2.
Inverting input to amplifier A8.
Inverting output of amplifier A2.
Auto-Zero capacitor pin (Negative terminal). The value of this capacitor determines the low-end frequency response of
the preamp A1.
Auto-Zero capacitor pin (Positive terminal). The value of this capacitor determines the low-end frequency response of the
preamp A1.
Non-inverting input of the preamp A1.
Inverting input of the preamp A1.
BLOCK DIAGRAM
V
CCA
8
IN
1B
IN
1A
C
AZP
C
AZN
20
19
18
17
A6
OUTPUT DISABLE
6
JAM
A1
V
CCD
7
GATED AMP
A2
OUT
2A
OUT
2B
14 16
IN
8B
15
IN
8A
13
SCHMITT TRIGGER
A8
10
V
OUT
PEAK DETECT
R
PKDET
11
A3
A4
5
FLAG
A5
A7
HYSTERESIS
4
GND
A
9
GND
D
3
THRESH
2
C
PKDET
12
R
HYST
1
LED
LED DRIVER
SD00355
Figure 2. Block Diagram
1998 Oct 07
3
Philips Semiconductors
Product specification
Postamplifier with link status indicator
SA5217
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CCA
V
CCD
T
A
T
J
P
D
Power supply
Power supply
Ambient temperature range
Operating junction temperature range
Power dissipation
PARAMETER
RATING
4.5 to 5.5
4.5 to 5.5
-40 to +85
-40 to +110
300
UNIT
V
V
°C
°C
mW
DC ELECTRICAL CHARACTERISTICS
Min and Max limits apply over the operating temperature range at V
CCA
= V
CCD
= +5.0V unless otherwise specified. Typical data applies at
V
CCA
= V
CCD
= +5.0V and T
A
= 25°C.
SYMBOL
I
CCA
I
CCD
V
I1
V
O2
V
I8L
V
I8H
V
OH
V
OL
I
OH
I
OL
I
OS
V
THRESH
V
RPKDET
V
RHYST
V
IHJ
V
ILJ
I
IHJ
I
ILJ
V
OHF
V
OLF
I
OHF
I
OLF
I
SCF
I
LEDH
PARAMETER
Analog supply current
Digital supply current (TTL, Flag, LED)
A1 input bias voltage (A,B inputs)
A1 output bias voltage (A,B outputs)
A8 input bias voltage Low (A,B inputs)
A8 input bias voltage High (A,B inputs)
High-level TTL output voltage
Low-level TTL output voltage
High-level TTL output current
Low-level TTL output current
Short-circuit TTL output current
Threshold bias voltage
RPKDET
RHYST bias voltage
High-level jam input voltage
Low-level jam input voltage
High-level jam input current
Low-level jam input current
High-level flag output voltage
Low-level flag output voltage
High-level flag output current
Low-level flag output current
Short-circuit flag output current
LED ON maximum sink current
V
IJ
=2.7V
V
IJ
=0.4V
I
OH
=-80µA
I
OL
=3.2mA
V
OUT
=2.4V
V
OUT
=0.4V
V
OUT
=0.0V
V
LED
=3.0V
3.25
-61
8
-485
2.4
-240
3.8
0.33
-18
10
-40
22
-26
80
0.4
-5
I
OH
=-200µA
I
OL
=8mA
V
OUT
=2.4V
V
OUT
=0.4V
V
OUT
=0.0V
Pin 3 Open
Pin 11 Open
Pin 12 Open
2.0
0.8
30
7.0
3.08
3.10
3.40
3.68
2.4
TEST CONDITIONS
LIMITS
Min
Typ
30
10
3.4
3.8
3.55
3.91
3.4
0.3
-40
30
-95
0.75
0.72
0.72
0.4
-24.4
Max
41.2
13.5
3.70
4.50
3.68
4.12
UNIT
mA
mA
V
V
V
V
V
V
mA
mA
mA
V
V
V
V
V
µA
µA
V
V
mA
mA
mA
mA
1998 Oct 07
4
Philips Semiconductors
Product specification
Postamplifier with link status indicator
SA5217
AC ELECTRICAL CHARACTERISTICS
Min and Max limits apply over the operating temperature range at V
CCA
= V
CCD
= +5.0V unless otherwise specified. Typical data applies at
V
CCA
= V
CCD
= +5.0V and T
A
= 25°C.
SYMBOL
f
OP
V
INH
PARAMETER
Maximum operating frequency
Maximum Functional A1 input signal (single en-
ded)
Minimum Functional A1 input signal (single-en-
ded)
Minimum Functional A1 input signal (differential)
V
INL
Minimum input sensitivity for output BER
≤
(single-ended)
10
–9
PRBS =
2
23
–1
1
4.5
PRBS = 2
23
–1
1200
2
2000
2
25
2
Test circuit, T
A
= 25°C
R
RHYST
=5k R
THRESH
=33k
(FLAG Low) Test circuit,
@ 50MHz
R
RHYST
=4k R
THRESH
=33k
Test Circuit
Test Circuit
50mV
P-P
, 1010. . .input
T
H
*
T
L 2
Distortion =
10
T
H
)
T
L
10
5
19
9.5
1.3
1.2
0.1
TBD
ns
ns
ns
%
Ω
pF
Ω
pF
Ω
pF
mV
P-P
TEST CONDITIONS
Test circuit
Test Circuit
LIMITS
Min
60
Typ
75
1.6
6
3
9
mV
P-P
Max
UNIT
MHz
V
P-P
Test CIrcuit
mV
P-P
PP
Minimum input sensitivity for output BER
≤
10
–9
(differential)
R
IN1
C
IN1
R
IN8
C
IN2
R
OUT2
C
OUT2
V
HYS
S
Input resistance (differential at IN
1
)
Input capacitance (differential at IN
1
)
Input resistance (differential at IN
2
)
Input capacitance (differential at IN
2
)
Output resistance (differential at OUT
2
)
Output capacitance (differential at OUT
2
)
Hysteresis voltage range (single-ended)
Hysteresis voltage range (differential)
Threshold voltage (single-ended)
Threshold voltage (differential)
t
TLH
t
THL
t
RFD
t
PWD
TTL Output Rise Time 20% to 80%
TTL Output Fall Time 80% to 20%
t
TLH
/t
THL
mismatch
Pulse width distortion of output
V
THR
mV
P-P
PP
V
CC
+5V
125
33k
0.1µF
1
2
3
4
5
6
7
8
9
10
NE5217
0.1µF
20
LED
IN
1B
19
C
PKDET
IN
1A
18
THRESH C
AZP
17
GND
A
C
AZN
16
FLAG
OUT
2B
15
JAM
IN
8B
14
V
CCD
OUT
2A
13
V
CCA
IN
8A
12
GND
D
R
HYST
11
V
OUT
R
PKDET
V
IN
0.1µF
0.1µF
25
0.1µF
0.1µF
4k
50
100µH
100µH
0.1µF
10k
10µF
400
V
OUT
15pF
SD00356
Figure 3. AC Test Circuit
1998 Oct 07
5
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