A4447
High Voltage Step Down Regulator
Features and Benefits
▪
▪
▪
▪
▪
▪
▪
Wide input voltage range: 8 to 50 V
Integrated low R
DS(on)
DMOS switch
2 A continuous output current
Adjustable fixed off-time
Highly efficient
Adjustable output: 0.8 to 24 V
Small package with exposed thermal pad
Description
The A4447 is a 2 A, high efficiency general-purpose buck
regulator designed for a wide variety of applications. The output
voltage is adjustable from 0.8 to 24 V, based on a resistor divider
and the 0.8 V ± 2 % reference. External components include
an external clamping diode, inductor, and filter capacitor.
The off-time is determined by an external resistor to ground.
It operates in both continuous and discontinuous modes to
maintain light load regulation. An internal blanking circuit is
used to filter out transients due to the reverse recovery of the
external clamp diode. Typical blanking time is 200 ns.
This new device is ideal for various end products including
applications with 8 to 50 V input voltage range and require up
to 2 A output current, such as uninterruptible power supplies,
point of sale (POS) applications, and industrial applications
with 24 or 36 V bus.
Applications include:
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Printer power supplies
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Office automation equipment
▪
POS thermal, laser, photo, and inkjet printers
▪
Tape drives
▪
Industrial applications
Package: 8 pin SOIC with exposed thermal
pad (suffix LJ)
Approximate Scale 1:1
Typical Application
+42
V
CBOOT
0.01
μF
CIN2
BOOT
VIN
CIN1
0.22
μF
Efficiency vs. Output Current
90
85
5
3.3
Efficiency %
D1
ENB
A4447
TSET
RTSET
54 k
GND
FB
R3 A
10 k
A R3 required when C
BYP
connected
R2
910
C
BYP
0.22
μF
VBIAS
R1
2.87 k
LX
L1
V
OUT
3.3 V
2A
80
75
70
65
60
0
500
1000
1500
2000
1.5
V
OUT
(V)
1.8
ESR
COUT
220
μF
25 V
I
OUT
(mA)
Data is for reference only. Efficiency data from circuit shown in left panel.
A4447-DS, Rev. 2
A4447
High Voltage Step Down Regulator
Absolute Maximum Ratings
Characteristic
VIN Supply Voltage
VBIAS Input Voltage
SW Switching Voltage
ENB Input Voltage Range
Operating Ambient Temperature Range
Junction Temperature
Storage Temperature
Symbol
V
IN
V
BIAS
V
S
V
ENB
T
A
T
J
(max)
T
stg
Conditions
Min.
–
–0.3
–1
–0.3
–20
–
–55
Typ.
–
–
–
–
–
–
–
Max.
50
7
–
7
85
150
150
Units
V
V
V
V
°C
°C
°C
*Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed
the specified current ratings, or a junction temperature, T
J
, of 150°C.
Thermal Characteristics*
may require derating at maximum conditions, see application section for optimization
Characteristic
Package Thermal Resistance
(Junction to Ambient)
Package Thermal Resistance
(Junction to Pad)
Symbol
R
θJA
R
θJP
Test Conditions*
On 4-layer PCB based on JEDEC standard
On 2-layer generic test PCB with 0.8 in.
2
of copper area each side
Value
35
62
2
Unit
ºC/W
ºC/W
ºC/W
*Additional thermal information available on the Allegro
™
website.
Ordering Information
Use the following complete part numbers when ordering:
Part Number
A4447SLJTR-T
Packing
13-in. reel, 3000 pieces/reel
Description
LJ package, SOIC surface mount with
exposed thermal pad; leadframe plating
100% matte tin.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A4447
High Voltage Step Down Regulator
Functional Block Diagram
BOOT
Boot Charge
VIN
+
V
IN
LX
L1
D1
ESR
COUT
VOUT
ENB
μC
Switch
Disable
Switch PWM Control
TSET
I_Peak
+
–
I_Demand
Error
COMP
GND
+
VBB UVLO
TSD
Soft Start
Ramp Generation
–
Clamp
C
BYP
FB
–
R3
Bias Supply
VBIAS
VBIAS is connected to VOUT
when V
OUT
target is between
3.3 and 5 V; otherwise, keep
VBIAS open
0.8 V
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A4447
High Voltage Step Down Regulator
ELECTRICAL CHARACTERISTICS
1,2
at T
A
= 25°C, V
IN
= 8 to 50 V (unless noted otherwise)
Characteristics
Symbol
Test Conditions
V
ENB
= LOW, I
OUT
= 0 mA, V
IN
= 42 V,
V
BIAS
= V
OUT
VIN Quiescent Current
3
I
VIN(Q)
V
ENB
= LOW, I
OUT
= 0 mA, V
IN
= 42 V,
V
BIAS
< 3 V
V
ENB
= HIGH
VBIAS Input Current
Buck Switch On Resistance
Fixed Off-Time Proportion
Feedback Voltage
Output Voltage Regulation
Feedback Input Bias Current
Soft Start Time
Buck Switch Current Limit
ENB Open Circuit Voltage
ENB Input Voltage Threshold
ENB Input Current
VIN Undervoltage Threshold
VIN Undervoltage Hysteresis
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
1
Negative
2
Specifications
Min.
–
–
–
–
–
–
–15
0.784
–3
–400
5
Typ.
0.90
4.4
–
3.5
450
650
–
0.8
–
–100
10
–
–
–
–
–
6.9
–
165
15
Max.
1.35
6.35
100
5
–
–
15
0.816
3
100
15
3
1.2
7
1.0
–1
7.2
1.1
–
–
Units
mA
mA
μA
mA
mΩ
mΩ
%
V
%
nA
ms
A
A
V
V
μA
V
V
°C
°C
I
BIAS
R
DS(on)
t
off
V
FB
V
OUT
I
FB
t
ss
I
CL
V
OC
V
ENB(0)
I
ENB(0)
V
UVLO
V
UVLO(hys)
T
JTSD
T
JTSD(hys)
V
BIAS
= V
OUT
T
A
= 25°C, I
OUT
= 2 A
T
A
= 125°C, I
OUT
= 2 A
Based on calculated value
I
OUT
= 0 mA to 2 A
V
FB
> 0.4 V
V
FB
< 0.4 V
Output disabled
LOW level input (Logic 0), output enabled
V
ENB
= 0 V
V
IN
rising
V
IN
falling
Temperature increasing
Recovery = T
JTSD
– T
JTSD(hys)
2.2
0.5
2.0
–
–10
6.6
0.7
–
–
current is defined as coming out of (sourcing) the specified device pin.
over the junction temperature range of 0ºC to 125ºC are assured by design and characterization.
3
VBIAS is connected to VOUT when the V
OUT
target is between 3.3 and 5 V.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A4447
High Voltage Step Down Regulator
Functional Description
The A4447 is a fixed off-time, current mode controlled, buck
regulator. The regulator requires an external clamping diode,
inductor, and filter capacitor. It operates in both continuous and
discontinuous modes. An internal blanking circuit is used to filter
out transients resulting from the reverse recovery of the external
clamp diode. Typical blanking time is 200 ns.
The value of a resistor between the TSET and GND determines
the fixed off-time (see graph in the t
OFF
section).
V
OUT
.
The output voltage is adjustable from 0.8 to 24 V, set by an
external resistor divider. The voltage can be calculated with the
following formula:
V
OUT
=
V
FB
× (1 + R1/R2)
(1)
Light Load Regulation.
To maintain voltage regulation during
light load conditions, the switching regulator enters a cycle-skip-
ping mode. As the output current decreases, there remains some
energy that is stored during the power switch minimum on-time.
In order to prevent the output voltage from rising, the regulator
skips cycles once it reaches the minimum on-time, effectively
making the off-time larger.
Soft Start.
An internal ramp generator and counter allow the out-
put to slowly ramp up. This limits the maximum demand on the
external power supply by controlling the inrush current required
to charge the external capacitor and any DC load at startup.
Internally, the ramp is set to 10 ms nominal rise time. During soft
start, current limit is 2.2 A minimum.
The following conditions are required to trigger a soft start:
• V
IN
> 6 V
• ENB pin input falling edge
• Reset of a TSD (thermal shut down) event
V
BIAS
.
To improve overall system efficiency, the regulator output,
V
OUT
, is connected to the VBIAS input to supply the operating
bias current during normal operating conditions. During startup
the circuitry is run off of the VIN supply. VBIAS should be con-
nected to VOUT when the V
OUT
target level is between 3.3 and
5 V. If the output voltage is less than 3.3 V, then the A4447 can
operate with an internal supply and pay a penalty in efficiency,
as the bias current will come from the high voltage supply, VIN.
VBIAS can also be supplied with an external voltage source. No
power-up sequencing is required for normal operation.
ON/OFF Control.
The ENB pin is externally pulled to ground
to enable the device and begin the soft start sequence. When the
ENB is open circuited, the switcher is disabled and the output
decays to 0 V.
Protection.
The buck switch will be disabled under one or more
of the following fault conditions:
• V
IN
< 6 V
• ENB pin = open circuit
• TSD fault
When the device comes out of a TSD fault, it will go into a soft
start to limit inrush current.
t
OFF
.
The value of a resistor between the TSET pin and ground
determines the fixed off-time. The formula to calculate t
OFF
(μs)
is:
⎛
1– 0.03 ×
V
BIAS
⎞
(2)
⎟
,
t
OFF
=
R
TSET
⎜
10.2 × 10
9
where R
TSET
(kΩ) is the value of the resistor. If the VBIAS pin is
left open, use V
BIAS
= 0 in equation 2. Results are shown in the
following graph:
Off-Time Setting versus Resistor Value
200
180
160
140
⎝
⎠
R
TSET
(kΩ)
120
100
80
60
40
20
0
1
2
3
4
5
V
BIAS
= 5 V
V
BIAS
= 3.3 V
6
7
8
9
10
11 12 13 14 15
16
t
OFF
(µs)
The R
TSET
resistor should be not smaller than 7.65 kΩ ±2% to
prevent very short off-times from violating the minimum on-time
of the switcher.
Shorted Load.
If the voltage on the FB pin falls below 0.4 V, the
regulator will invoke a 0.85 A typical overcurrent limit to handle
the shorted load condition at the regulator output. For low output
voltages at power up and in the case of a shorted output, the off-
time is extended to prevent loss of control of the current limit due
to the minimum on-time of the switcher.
The extension of the off-time is based on the value of the TSET
multiplier and the FB voltage, as shown in the following table:
V
FB
(V)
< 0.16
< 0.32
< 0.5
> 0.5
TSET Multiplier
8 × t
OFF
4 × t
OFF
2 × t
OFF
t
OFF
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
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