INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4053
Triple 2-channel analog
multiplexer/demultiplexer
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
FEATURES
•
Low “ON” resistance:
80
Ω
(typ.) at V
CC
−
V
EE
= 4.5 V
70
Ω
(typ.) at V
CC
−
V
EE
= 6.0 V
60
Ω
(typ.) at V
CC
−
V
EE
= 9.0 V
•
Logic level translation:
to enable 5 V logic to communicate
with
±
5 V analog signals
•
Typical “break before make” built in
•
Output capability: non-standard
•
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4053 are high-speed Si-gate CMOS
devices and are pin compatible with the “4053” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
QUICK REFERENCE DATA
V
EE
= GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
74HC/HCT4053
The 74HC/HCT4053 are triple 2-channel analog
multiplexers/demultiplexers with a common enable input
(E). Each multiplexer/demultiplexer has two independent
inputs/outputs (nY
0
and nY
1
), a common input/output (nZ)
and three digital select inputs (S
1
to S
3
).
With E LOW, one of the two switches is selected (low
impedance ON-state) by S
1
to S
3
. With E HIGH, all
switches are in the high impedance OFF-state,
independent of S
1
to S
3
.
V
CC
and GND are the supply voltage pins for the digital
control inputs (S
1
, to S
3
, and E). The V
CC
to GND ranges
are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The
analog inputs/outputs (nY
0
and nY
1
, and nZ) can swing
between V
CC
as a positive limit and V
EE
as a negative limit.
V
CC
−
V
EE
may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, V
EE
is
connected to GND (typically ground).
TYPICAL
SYMBOL
t
PZH
/ t
PZL
PARAMETER
turn “ON” time
E to V
OS
S
n
to V
OS
t
PHZ
/ t
PLZ
turn “OFF” time
E to V
OS
S
n
to V
OS
C
I
C
PD
C
S
input capacitance
power dissipation capacitance per switch notes 1 and 2
max. switch capacitance
independent (Y)
common
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+∑ {(C
L
+C
S
)
×
V
CC2
×
f
o
} where:
f
i
= input frequency in MHz; f
o
= output frequency in MHz
∑
{(C
L
+C
S
)
×
V
CC2
×
f
o
} = sum of outputs
C
L
= output load capacitance in pF; C
S
= max. switch capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
December 1990
2
(Z)
5
8
5
8
pF
pF
18
17
3.5
36
20
19
3.5
36
ns
ns
pF
pF
CONDITIONS
HC
C
L
= 15 pF; R
L
= 1 kΩ; V
CC
= 5 V
17
21
23
21
ns
ns
HCT
UNIT
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PIN DESCRIPTION
PIN NO.
2, 1
5, 3
6
7
8
11, 10, 9
12, 13
14, 15, 4
16
SYMBOL
2Y
0
to, 2Y
1
3Y
0
to, 3Y
1
E
V
EE
GND
S
1
to S
3
1Y
0
, 1Y
1
1Z to 3Z
V
CC
NAME AND FUNCTION
independent inputs/outputs
independent inputs/outputs
enable input (active LOW)
negative supply voltage
ground (0 V)
select inputs
independent inputs/outputs
common inputs/outputs
positive supply voltage
74HC/HCT4053
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
APPLICATIONS
•
Analog multiplexing and demultiplexing
•
Digital multiplexing and demultiplexing
•
Signal gating
FUNCTION TABLE
INPUTS
CHANNEL ON
E
L
L
H
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
S
n
L
H
X
nY
0
−
nZ
nY1
−
nZ
none
74HC/HCT4053
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
December 1990
4
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to V
EE
= GND (ground = 0 V)
SYMBOL
V
CC
±I
IK
±I
SK
±I
S
±I
EE
±I
CC
;
±I
GND
T
stg
P
tot
PARAMETER
DC supply voltage
DC digital input diode current
DC switch diode current
DC switch current
DC V
EE
current
DC V
CC
or GND current
storage temperature range
power dissipation per package
plastic DIL
plastic mini-pack (SO)
P
S
power dissipation per switch
750
500
100
mW
mW
mW
−65
MIN.
−0.5
MAX.
+11.0
20
20
25
20
50
+150
UNIT
V
mA
mA
mA
mA
mA
°C
74HC/HCT4053
CONDITIONS
for V
I
< −0.5
V or V
I
>
V
CC
+ 0.5 V
for V
S
< −0.5
V or V
S
>
V
CC
+ 0.5 V
for
−0.5
V
<
V
S
<
V
CC
+ 0.5 V
for temperature range:
−40
to + 125
°C
74HC/HCT
above + 70
°C:
derate linearly with 12 mW/K
above + 70
°C:
derate linearly with 8 mW/K
Note to ratings
To avoid drawing V
CC
current out of terminals nZ, when switch current flows in terminals nY
n
, the voltage drop across
the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no V
CC
current will flow out
of terminals nY
n
. In this case there is no limit for the voltage drop across the switch, but the voltages at nY
n
and nZ may
not exceed V
CC
or V
EE
.
RECOMMENDED OPERATING CONDITIONS
74HC
SYMBOL PARAMETER
min.
V
CC
V
CC
V
I
V
S
T
amb
T
amb
DC supply voltage V
CC
−GND
DC supply voltage V
CC
−V
EE
DC input voltage range
DC switch voltage range
operating ambient temperature
range
operating ambient temperature
range
2.0
2.0
GND
V
EE
−40
−40
typ.
5.0
5.0
max.
10.0
10.0
V
CC
V
CC
+85
min. typ.
4.5
2.0
GND
V
EE
−40
5.0
5.0
max.
5.5
10.0
V
CC
V
CC
+85
+125
V
V
V
V
°C
see DC and AC
+125
−40
1000
500
400
250
°C
CHARACTERISTICS
74HCT
UNIT
CONDITIONS
see Figs 6 and 7
see Figs 6 and 7
t
r
, t
f
input rise and fall times
6.0
6.0
500
ns
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
CC
= 10.0 V
December 1990
5
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