INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4002
Dual 4-input NOR gate
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Dual 4-input NOR gate
FEATURES
•
Output capability: standard
•
I
CC
category: SSI
GENERAL DESCRIPTION
74HC/HCT4002
The 74HC/HCT4002 are high-speed Si-gate CMOS devices and are pin compatible with “4002” of the “4000B” series.
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4002 provide the 4-input NOR function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL
/ t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
propagation delay nA, nB, nC, nD to nY
input capacitance
power dissipation capacitance per gate
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
9
3.5
16
HCT
11
3.5
22
ns
pF
pF
UNIT
December 1990
2
Philips Semiconductors
Product specification
Dual 4-input NOR gate
PIN DESCRIPTION
PIN NO.
1, 13
2, 9
3, 10
4, 11
5, 12
6, 8
7
14
SYMBOL
1Y, 2Y
1A, 2A
1B, 2B
1C, 2C
1D, 2D
n.c.
GND
V
CC
NAME AND FUNCTION
data outputs
data inputs
data inputs
data inputs
data inputs
not connected
ground (0 V)
positive supply voltage
74HC/HCT4002
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Dual 4-input NOR gate
FUNCTION TABLE
INPUTS
nA
L
H
X
X
X
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
nB
L
X
H
X
X
nC
L
X
X
H
X
74HC/HCT4002
OUTPUT
nD
L
X
X
X
H
nY
H
L
L
L
L
Fig.4 Functional diagram.
Fig.5 Logic diagram 74HC4002 (one gate).
Fig.6 Logic diagram 74HCT4002 (one gate).
December 1990
4
Philips Semiconductors
Product specification
Dual 4-input NOR gate
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Out put capability: standard
I
CC
category: SSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL PARAMETER
min.
t
PHL
/ t
PLH
propagation delay
nA, nB, nC, nD to nY
output transition time
+25
typ.
30
11
9
19
7
6
−40
to
+85
max. min.
100
20
17
75
15
13
max.
125
25
21
95
19
16
−40
to
+125
min.
max.
150
30
26
110
22
19
ns
74HC/HCT4002
TEST CONDITIONS
UNIT
V
CC
WAVEFORMS
(V)
2.0
4.5
6.0
2.0
4.5
6.0
Fig.7
t
THL
/ t
TLH
ns
Fig.7
December 1990
5