INTEGRATED CIRCUITS
74LVC377
Octal D-type flip-flop with data enable;
positive-edge trigger
Product specification
Supersedes data of 1996 Jun 06
IC24 Data Handbook
1998 Jul 29
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger
74LVC377
FEATURES
•
Wide supply voltage range of 1.2V to 3.6V
•
Conforms to JEDEC standard 8-1A
•
Inputs accept voltages up to 5.5V
•
CMOS low power consumption
•
Direct interface with TTL levels
•
Output drive capability 50Ω transmission lines @ 85°C
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25°C; t
r
=t
f
v2.5
ns
SYMBOL
t
PHL
/t
PLH
f
max
C
I
C
PD
PARAMETER
Propagation delay
CP to Qn;
Maximum clock frequency
Input capacitance
Power dissipation
capacitance per flip-flop
DESCRIPTION
The 74LVC377 is a low-voltage Si-gate CMOS device, superior to
most advanced CMOS compatible TTL families.
The 74LVC377 has eight edge-triggered , D-type flip-flops with
individual D inputs and Q outputs. A common clock (CP) input loads
all flip-flops simultaneously when the data enable E is LOW. The
state of each D input, one set-up time before the LOW-to-HIGH
clock transition, is transferred to the corresponding output (Qn) of
the flip-flop. The E input must be stable only one set-up time prior to
the LOW-to-HIGH transition for predictable operation.
CONDITIONS
C
L
= 50pF
V
CC
= 3.3V
TYPICAL
6.0
230
5.0
UNIT
ns
MHz
pF
pF
V
I
= GND to V
CC1
22
NOTES:
1 C
PD
is used to determine the dynamic power dissipation (P
D
in
µW)
V
CC2
x f
i
)S
(C
L
V
CC2
f
o
) where:
P
D
= C
PD
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
V
CC2
f
o
) = sum of the outputs.
S
(C
L
ORDERING INFORMATION
PACKAGES
20-Pin Plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74LVC377 D
74LVC377 DB
74LVC377 PW
NORTH AMERICA
74LVC377 D
74LVC377 DB
74LVC377PW DH
DWG NUMBER
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
E
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
V
CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
PIN DESCRIPTION
PIN
NUMBER
1
2, 5, 6,
9, 12, 15,
16, 19
3, 4, 7,
8, 13, 14,
17, 18
10
11
20
SY00058
SYMBOL
E
Q0 – Q7
FUNCTION
Data enable input (active LOW)
Flip-flop outputs
D0 – D7
GND
CP
V
CC
Data inputs
Ground (0V)
Clock input (LOW-to-HIGH,
edge-triggered)
Positive power supply
GND 10
1998 Jul 29
2
Philips Semiconductors
Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger
74LVC377
LOGIC SYMBOL
11
LOGIC SYMBOL (IEEE/IEC)
CP
E
CP
11
1
3
4
7
8
13
14
17
18
1C2
G1
2D
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
3
4
7
8
13
14
17
18
D0
D1
D2
D3
D4
D5
D6
D7
E
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
D0
D1
D2
D3
D4
D5
15
16
19
D6
D7
SY00060
1
SY00059
FUNCTION TABLE
OPERATING
MODES
Load ‘1’
Load ‘0’
hold
(do nothing)
INPUTS
CP
°
°
°
X
E
l
l
h
H
Dn
h
l
X
X
OUTPUT
Q
n
H
L
no change
no change
H = HIGH voltage level
h = HIGH voltage level one set-up time
prior to the LOW-to-HIGH CP transition
L = LOW voltage level
I = LOW voltage level one set-up time
prior to the LOW-to-HIGH CP transition
°
= LOW-to-HIGH transition
X = Don’t care
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
CC
V
I
V
I/O
V
O
T
amb
t
r
, t
f
PARAMETER
DC supply voltage (for max. speed performance)
DC supply voltage (for low-voltage applications)
DC Input voltage range
DC Input voltage range for I/Os
DC output voltage range
Operating free-air temperature range
Input rise and fall times
V
CC
= 1.2 to 2.7V
V
CC
= 2.7 to 3.6V
CONDITIONS
MIN
2.7
1.2
0
0
0
–40
0
0
MAX
3.6
3.6
5.5
V
CC
V
CC
+85
20
10
V
V
V
V
V
°C
ns/V
UNIT
1998 Jul 29
3
Philips Semiconductors
Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
V
CC
I
IK
V
I
V
I/O
I
OK
V
OUT
I
OUT
I
GND
, I
CC
T
stg
P
TOT
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
DC input voltage range for I/Os
DC output diode current
DC output voltage
DC output source or sink current
DC V
CC
or GND current
Storage temperature range
Power dissipation per package
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
V
O
uV
CC
or V
O
t
0
Note 2
V
O
= 0 to V
CC
V
I
t0
Note 2
CONDITIONS
74LVC377
RATING
–0.5 to +6.5
–50
–0.5 to +5.5
–0.5 to V
CC
+0.5
"50
–0.5 to V
CC
+0.5
"50
"100
–60 to +150
500
500
UNIT
V
mA
V
V
mA
V
mA
mA
°C
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
MIN
V
IH
HIGH level Input voltage
V
CC
= 1.2V
V
CC
= 2.7 to 3.6V
LOW level Input voltage
V
CC
= 1.2V
V
CC
= 2.7 to 3.6V
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= –12mA
V
O
OH
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= –100µA
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= –12mA
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= –24mA
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
V
OL
LOW level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100µA
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
I
I
I
IHZ
/I
ILZ
I
OZ
I
CC
∆I
CC
Input leakage current
Input current for common I/O pins
3-State output OFF-state current
Quiescent supply current
Additional quiescent supply current
V
CC
= 3 6V; V
I
= 5 5V or GND
3.6V;
5.5V
V
CC
= 3.6V; V
I
= V
CC
or GND
V
CC
= 3.6V; V
I
= V
IH
or V
IL
; V
O
= V
CC
or GND
V
CC
= 3.6V; V
I
= V
CC
or GND; I
O
= 0
V
CC
= 2.7V to 3.6V; V
I
= V
CC
–0.6V; I
O
= 0
Not for I/O pins
"0
1
"0.1
"0.1
0.1
0.1
5
V
CC
*0.5
V
CC
*0.2
V
CC
*0.6
V
CC
*1.0
0.40
0.20
0.55
"5
"15
"10
10
500
µA
µA
µA
µA
µA
V
V
CC
V
V
CC
2.0
GND
V
0.8
TYP
1
MAX
V
UNIT
V
IL
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
1998 Jul 29
4
Philips Semiconductors
Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger
74LVC377
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
= 2.5ns; C
L
= 50pF; R
L
= 500Ω; T
amb
= –40°C to +85°C.
LIMITS
SYMBOL
t
PHL
t
PLH
t
W
t
su
t
h
t
su
t
h
f
max
PARAMETER
Propagation delay
CP to Qn
Clock pulse width
HIGH or LOW
Set-up time
E to CP
Hold time
E to CP
Set-up time
D
n
to CP
Hold time
D
n
to CP
Maximum clock
pulse frequency
WAVEFORM
V
CC
= 3.3V
±0.3V
MIN
1
1
2
2
3
3
1
4
4
0
2
0
125
TYP
1
6.0
1.0
2.3
–2.2
1.3
–1.2
MAX
10.2
5
5
0
3
0
100
MIN
V
CC
= 2.7V
TYP
6.6
1.6
2.9
–2.8
1.8
–1.6
MAX
11.2
ns
ns
ns
ns
ns
ns
MHz
UNIT
NOTE:
1. Unless otherwise stated, all typical values are at V
CC
= 3.3V and T
amb
= 25°C.
AC WAVEFORMS
V
M
= 1.5V at V
CC
w
2.7V.
V
M
= 0.5 V
CC
at V
CC
t
2.7V.
V
OL
and V
OH
are the typical output voltage drop that occur with the output load.
1/f
MAX
V
I
CP INPUT
GND
t
w
t
PHL
V
M
V
CC
t
PLH
D
n
Input
GND
V
CC
V
M
V
CC
E Input
GND
V
M
t
su
STABLE
V
OH
Qn OUTPUT
V
OL
V
M
t
su
SW00078
CP Input
GND
Waveform 1. Clock (CP) to output (Qn) propagation delays the
clock pulse width and the maximum clock pulse frequency.
NOTE:
The shaded areas indicate when the input is permitted to change
for predictable output performance.
Waveform 2. Data set-up and hold times from the data input
(Dn) and from the enable
input (E) to the clock (CP).
1998 Jul 29
5
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t
h
t
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t
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t
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M
SY00061
嵌入式系统
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