74F521 8-Bit Identity Comparator
April 1988
Revised August 1999
74F521
8-Bit Identity Comparator
General Description
The 74F521 is an expandable 8-bit comparator. It com-
pares two words of up to eight bits each and provides a
LOW output when the two words match bit for bit. The
expansion input I
A=B
also serves as an active LOW enable
input.
Features
s
Compares two 8-bit words in 6.5 ns typ
s
Expandable to any word length
s
20-pin package
Ordering Code:
Order Number
74F521SC
74F521SJ
74F521MSA
74F521PC
Package Number
M20B
M20D
MSA20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation
DS009545
www.fairchildsemi.com
74F521
Unit Loading/Fan Out
U.L.
Pin Names
A
0
–A
7
B
0
–B
7
I
A=B
O
A=B
Word A Inputs
Word B Inputs
Expansion or Enable Input (Active LOW)
Identity Output (Active LOW)
Description
1.0/1.0
1.0/1.0
1.0/1.0
50/33.3
Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
20
µA/−0.6
mA
20
µA/−0.6
mA
20
µA/−0.6
mA
−1
mA/20 mA
Truth Table
Inputs
I
A
=
B
L
L
H
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Note 1:
A
0
=
B
0
, A
1
=
B
1
, A
2
=
B
2
, etc.
Output
A, B
A
=
B (Note 1)
A
≠
B
A
=
B (Note 1)
A
≠
B
O
A
=
B
L
H
H
H
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
74F521
Absolute Maximum Ratings
(Note 2)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 3)
Input Current (Note 3)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
−0.5V
to V
CC
−0.5V
to
+5.5V
−65°C
to
+150°C
−55°C
to
+125°C
−55°C
to
+150°C
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−30
mA to
+5.0
mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to
+70°C
+4.5V
to
+5.5V
Note 2:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 3:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OS
I
CCH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Short-Circuit Current
Power Supply Current
−60
21
4.75
3.75
−0.6
−150
32
5.0
7.0
50
µA
µA
µA
V
µA
mA
mA
mA
Max
Max
Max
0.0
0.0
Max
Max
Max
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
V
OUT
=
0V
V
O
=
HIGH
10% V
CC
5% V
CC
10% V
CC
2.5
2.7
0.5
V
Min
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
V
Min
Min
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −1
mA
I
OH
= −1
mA
I
OL
=
20 mA
3
www.fairchildsemi.com
74F521
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay
A
n
or B
n
to O
A=B
Propagation Delay
I
A=B
to O
A=B
3.0
4.5
3.0
3.5
V
CC
= +5.0V
C
L
=
50 pF
Typ
7.0
7.0
5.0
6.5
Max
10.0
10.0
6.5
9.0
T
A
= −55°C
to
+125°C
V
CC
= +5.0V
C
L
=
50 pF
Min
3.0
4.0
3.0
3.5
Max
14.0
15.0
8.5
13.5
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
3.0
4.0
3.0
3.5
Max
11.0
ns
11.0
7.5
ns
10.0
Units
Applications
Ripple Expansion
Parallel Expansion
www.fairchildsemi.com
4
74F521
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
www.fairchildsemi.com
模拟电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
