Philips Semiconductors
Product specification
Arithmetic Logic Unit
74F381
FEATURES
•
Low-input loading minimizes drive requirements
•
Performs six arithmetic and logic functions
•
Selectable Low (clear) and High (preset) functions
•
Carry Generate and Propagate outputs for use with Carry
look-ahead generator
PIN CONFIGURATION
A1 1
B1 2
A0 3
B0 4
S0 5
20 V
CC
19 A2
18 B2
17 A3
16 B3
15 Cn
14 P
13 G
12 F3
11 F2
DESCRIPTION
The 74F381 performs three arithmetic and three logic operations on
two 4-bit words, A and B. Three additional Select (S0–S2) input
codes force the Function outputs Low or High. Carry Propagate (P)
and Generate (G) ouputs are provided for use with the 74F182
Carry Look Ahead Generator for high-speed expansion to longer
word lengths. For ripple expansion, refer to the 74F382 ALU data
sheet.
Signals applied to the Select inputs (S0–S2) determine the mode of
operation, as indicated in the Function Select Table. An extensive
listing of input and output function levels is shown in the Function
Table. The circuit performs the arithmetic functions for either
active-HIgh or active-Low operands, with output levels in the same
convention. In the subtract operating modes, it is necessary to force
a Carry (High for active-HIgh operands, Low for active-Low
operands) into the Cn input of the least significant package. The
Carry Generate (G) and Carry Propagate (P) outputs supply input
signals to the 74F182 Carry look-ahead generator for expansion to
longer word length, as shown in Figure 1. Note that a 74F382 ALU is
used for the most significant package. Typical delays for Figure 1
are given in Table 1.
S1 6
S2 7
F0
8
F1 9
GND 10
SF00921
TYPE
74F381
TYPICAL
PROPAGATION
DELAY
6.5ns
TYPICAL SUPPLY
CURRENT (TOTAL)
59mA
ORDERING INFORMATION
DESCRIPTION
20-pin plastic DIP
20-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F381N
N74F381D
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
A0 – A3
B0 – B3
S0 – S2
Cn
P
G
A operand inputs
A operand inputs
Function select inputs
Carry input
Carry Propagate ouptut (active-Low)
Carry Generate ouptut (active-Low)
DESCRIPTION
74F (U.L.)
HIGH/LOW
1.0/4.0
1.0/4.0
1.0/1.0
1.0/4.0
50/33
50/33
50/33
LOAD VALUE
HIGH/LOW
20µA/2.4mA
20µA/2.4mA
20µA/0.6mA
20µA/2.4mA
1.0mA/20mA
1.0mA/20mA
1.0mA/20mA
F0–F3
Outputs
NOTE:
One (1.0) FAST unit load is defined as 20µA in the High state and 0.6mA in the Low state.
1989 Mar 01
1
853–0418 95907
Philips Semiconductors
Product specification
Arithmetic Logic Unit
74F381
FUNCTION SELECT TABLE
SELECT
S0
L
H
L
H
L
H
L
S1
L
L
H
H
L
L
H
S2
L
L
L
L
H
H
H
H
OPERATING
MODE
Clear
B minus A
A minus B
A Plus B
A
AB
Preset
B
A+B
Table 1. 16-Bit Delay Tabulation
PATH SEGMENT
Ai or Bi to P
Pi to Cn+i (74F182)
Cn to F
Cn to Cn+4, OVR
Total Delay
TOWARD
F
7.2ns
6.2ns
8.1ns
–
21.5ns
OUTPUT
Cn+4, OVR
7.2ns
6.2ns
–
8.0ns
21.4ns
H
H
H = High voltage level
L = Low voltage level
APPLICATION
A0–A3
B0–B3
A4–A7
B4–B7
A8–A11
B8–B11
A12–A15
B12–B15
4
A
C
IN
Cn
S
F
3
SELECT
3
F0–F3
G0
Cn
74F381
Q
B
4
A
Cn
S
P
3
F
4
B
4
A
Cn
4
B
4
A
Cn
4
B
4
Cn+4
74F382
C
OUT
OVERFLOW
74F381
Q
P
3
S
F
74F381
Q
P
3
S
F
OVR
F4–F7
P0
Cn+x
G1
P1
Cn+y
F8–F11
G2
P2
Cn+z
F12–F15
74F182
SF00925
Figure 1. 16-bit Look-ahead Carry ALU Expansion
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
STG
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +1
–0.5 to V
CC
40
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°
C
°
C
1989 Mar 01
5
FPGA/CPLD
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