74F352 Dual 4-Input Multiplexer
May 1988
Revised August 1999
74F352
Dual 4-Input Multiplexer
General Description
The 74F352 is a very high-speed dual 4-input multiplexer
with common Select inputs and individual Enable inputs for
each section. It can select two bits of data from four
sources. The two buffered outputs present data in the
inverted (complementary) form. The 74F352 is the func-
tional equivalent of the 74F153 except with inverted out-
puts.
Features
s
Inverted version of 74F153
s
Separate enables for each multiplexer
s
Input clamp diode limits high speed termination effects
Ordering Code:
Order Number
74F352SJ
74F352PC
Package Number
M16D
N16E
Package Description
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Truth Table
Select
Inputs
S
0
X
L
L
H
H
L
L
H
H
S
1
X
L
L
L
L
H
H
H
H
E
H
L
L
L
L
L
L
L
L
Inputs (a or b)
I
0
X
L
H
X
X
X
X
X
X
I
1
X
X
X
L
H
X
X
X
X
I
2
X
X
X
X
X
L
H
X
X
I
3
X
X
X
X
X
X
X
L
H
Output
Z
H
H
L
H
L
H
L
H
L
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
© 1999 Fairchild Semiconductor Corporation
DS009519
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74F352
Unit Loading/Fan Out
Pin Names
I
0a
–I
3a
I
0b
–I
3b
S
0
–S
1
E
a
E
b
Z
a
, Z
b
Description
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Enable Input (Active LOW)
Side B Enable Input (Active LOW)
Multiplexer Outputs (Inverted)
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33.3
Input I
IH
/I
IL
Output I
OH
/I
OL
20
µA/−0.6
mA
20
µA/−0.6
mA
20
µA/−0.6
mA
20
µA/−0.6
mA
20
µA/−0.6
mA
−1
mA/20 mA
Functional Description
The 74F352 is a dual 4-input multiplexer. It selects two bits
of data from up to four sources under the control of the
common Select inputs (S
0
, S
1
). The two 4-input multiplexer
circuits have individual active LOW Enables (E
a
, E
b
) which
can be used to strobe the outputs independently. When the
Enables (E
a
, E
b
) are HIGH, the corresponding outputs (Z
a
,
Z
b
) are forced HIGH. The logic equations for the outputs
are shown below:
Z
a
=
E
a
• (I
0a
• S
1
• S
0
+
I
1a
• S
1
• S
0
+
I
2a
• S
1
• S
0
+
I
3a
• S
1
• S
0
)
Z
b
=
E
b
• (I
0b
• S
1
• S
0
+
I
1b
• S
1
• S
0
+
I
2b
• S
1
• S
0
+
I
3b
• S
1
• S
0
)
The 74F352 can be used to move data from a group of reg-
isters to a common output bus. The particular register from
which the data came would be determined by the state of
the Select inputs. A less obvious application is as a func-
tion generator. The 74F352 can generate two functions of
three variables. This is useful for implementing highly irreg-
ular random logic.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74F352
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
−0.5V
to V
CC
−0.5V
to
+5.5V
−65°C
to
+150°C
−55°C
to
+125°C
−55°C
to
+150°C
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−30
mA to
+5.0
mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to
+70°C
+4.5V
to
+5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OS
I
CCH
I
CCL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Short-Circuit Current
Power Supply Current
Power Supply Current
−60
9.3
13.3
4.75
3.75
−0.6
−150
14
20
5.0
7.0
50
µA
µA
µA
V
µA
mA
mA
mA
mA
Max
Max
Max
0.0
0.0
Max
Max
Max
Max
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
V
OUT
=
0V
V
O
=
HIGH
V
O
=
LOW
10% V
CC
5% V
CC
10% V
CC
2.5
2.7
0.5
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
V
V
Min
Min
Min
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −1
mA
I
OH
= −1
mA
I
OL
=
20 mA
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay
S
n
to Z
n
Propagation Delay
E
n
to Z
n
Propagation Delay
I
n
to Z
n
4.0
3.5
3.0
3.0
2.0
1.3
V
CC
= +5.0V
C
L
=
50 pF
Typ
8.0
6.5
4.5
5.0
5.2
2.5
Max
11.0
8.5
6.0
7.0
7.0
4.0
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
3.5
3.0
2.5
2.5
2.0
1.0
Max
12.5
9.5
7.0
8.0
8.0
4.5
ns
Units
ns
ns
3
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74F352
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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4
74F352 Dual 4-Input Multiplexer
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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