Philips Semiconductors
Product specification
8-input NAND gate
74F30
TYPE
TYPICAL
PROPAGATION
DELAY
3.2ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
1.7mA
PIN CONFIGURATION
Da
Db
Dc
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
NC
Dh
Dg
NC
NC
Q
74F30
ORDERING INFORMATION
DESCRIPTION
14-pin plastic DIP
14-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F30N
N74F30D
PKG DWG #
SOT27-1
Dd
De
Df
GND
SF00070
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
Dn
Q
Data inputs
Data output
DESCRIPTION
74F (U.L.) HIGH/LOW
1.0/1.0
50/33
LOAD VALUE HIGH/LOW
20µA/0.6mA
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC DIAGRAM
Da
Db
Dc
Dd
De
Df
Dg
V
CC
= Pin 14
GND = Pin 7
Dh
1
FUNCTION TABLE
INPUTS
Dna
2
OUTPUT
Dnf
X
X
X
X
X
L
X
X
H
Dng
X
X
X
X
X
X
L
X
H
Dnh
X
X
X
X
X
X
X
L
H
Qn
H
H
H
H
H
H
H
H
L
Dnb
X
L
X
X
X
X
X
X
Dnc
X
X
L
X
X
X
X
X
Dnd
X
X
X
L
X
X
X
X
Dne
X
X
X
X
L
X
X
X
H
L
3
4
8
5
6
11
12
Q
X
X
X
X
X
X
X
SF00071
H
H
H
H
NOTES:
1. H = High voltage level
2. L = Low voltage level
3. X = Don’t care
LOGIC SYMBOL
IEC/IEEE SYMBOL
1
&
1
2
3
4
5
6
11
12
2
3
Da
Db Dc
Dd
De
Df
Dg
Dh
4
8
5
Q
6
11
8
V
CC
= Pin 14
GND = Pin 7
12
SF00072
SF00073
March 3, 1989
2
853–0050 95941
Philips Semiconductors
Product specification
8-input NAND gate
74F30
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
40
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–1
20
+70
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
March 3, 1989
3
Philips Semiconductors
Product specification
8-input NAND gate
74F30
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Short-circuit output current
3
Supply current (total)
I
CCH
I
CCL
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OL
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
CC
= MAX
V
IN
= GND
V
IN
= 4.5V
–60
0.6
2.8
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
LIMITS
MIN
2.5
2.7
3.4
0.30
0.30
–0.73
0.50
0.50
–1.2
100
20
–0.6
–150
1.5
4.0
V
µA
µA
mA
mA
mA
V
TYP
2
MAX
UNIT
V
O
OH
High-level
High level output voltage
V
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5.0V
T
amb
= +25°C
C
L
= 50pF, R
L
= 500Ω
MIN
t
PLH
t
PHL
Propagation delay
Da, Db, Dc, Dd, De, Df, Dg, Dh to Q
Waveform 1
1.5
1.0
TYP
3.5
3.0
MAX
5.0
4.5
V
CC
= +5.0V
±
10%
T
amb
= 0°C to +70°C
C
L
= 50pF, R
L
= 500Ω
MIN
1.5
1.0
MAX
5.5
5.0
ns
UNIT
AC WAVEFORMS
Da, Db, Dc, Dd,
De, Df, Dg, Dh
V
M
t
PHL
V
M
t
PLH
Q
V
M
V
M
SF00074
Waveform 1. Propagation Delay for Inverting Outputs
NOTE:
For all waveforms, V
M
= 1.5V.
March 3, 1989
4
Philips Semiconductors
Product specification
8-input NAND gate
74F30
TEST CIRCUIT AND WAVEFORMS
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
t
TLH (
t
r
)
90%
POSITIVE
PULSE
V
M
10%
t
w
t
THL (
t
f
)
AMP (V)
90%
V
M
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00006
March 3, 1989
5
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