INTEGRATED CIRCUITS
74F280B
9-bit odd/even parity generator/checker
Product specification
IC15 Data Handbook
1996 Mar 12
Philips
Semiconductors
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
FEATURES
•
High-impedance NPN base inputs for reduced loading
(20µA in Low and High states)
PIN CONFIGURATION
I
6
I
7
NC
I
8
Σ
E
Σ
O
GND
1
2
3
4
5
6
7
14 V
CC
13 I
5
12 I
4
11
I
3
•
Buffered inputs — one normalized load
•
Word length easily expanded by cascading
•
Industrial temperature range available (–40°C to +85°C)
DESCRIPTION
The 74F280B is a 9-bit Parity Generator or Checker commonly used
to detect errors in high speed data transmission or data retrieval
systems. Both Even (∑
E
) and Odd (∑
O
) parity outputs are available
for generating or checking even or odd parity on up to 9 bits.
The Even (∑
E
) parity output is High when an even number of Data
inputs (I
0
- I
8
) are High. The Odd (∑
O
) parity output is High when an
odd number of Data inputs are High.
Expansion to larger word sizes is accomplished by tying the Even
(∑
E
) outputs of up to nine parallel devices to the data inputs of the
final stage. This expansion scheme allows an 81-bit data word to be
checked in less than 20ns.
TYPE
74F280B
10 I
2
9
8
I
1
I
0
SF00849
TYPICAL
PROPAGATION
DELAY
5.5ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
26mA
ORDERING INFORMATION
DESCRIPTION
14-pin plastic DIP
14-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F280BN
N74F280BD
INDUSTRIAL RANGE
V
CC
= 5V
±10%,
T
amb
= –40°C to +85°C
I74F280BN
I74F280BD
PKG. DWG. #
SOT27-1
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
I
0
- I
8
∑
E
,
∑
O
DESCRIPTION
Data inputs
Parity outputs
74F(U.L.)
HIGH/LOW
1.0/0.033
50/33
LOAD VALUE
HIGH/LOW
20µA/20µA
1.0mA/20mA
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
8
9
10 11 12 13
1
2
4
8
9
2K
I
0
I
1
I
2
I
3
I
4
I
5
I
6
I
7
I
8
10
11
12
Σ
E
5
Σ
E
Σ
O
13
1
2
Σ
O
6
5
6
4
V
CC
=Pin 14
GND=Pin 7
SF00845
SF00846
1996 Mar 12
2
853-0363 16555
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
LOGIC DIAGRAM
8
I
0
I
1
9
I
2
10
5
Σ
E
I
3
I
4
11
12
I
5
13
6
Σ
O
I
6
I
7
1
2
I
8
V
CC
=Pin 14
GND=Pin 7
4
SF00847
FUNCTION TABLE
INPUTS
Number of High Data Inputs (I
0
- I
8
)
Even — 0, 2, 4, 6, 8
Odd — 1, 3, 5, 7, 9
H = High voltage level
L = Low voltage level
OUTPUTS
∑
E
H
L
∑
O
L
H
1996 Mar 12
3
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
free air
Storage temperature
Commercial range
Industrial range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
40
0 to +70
–40 to +85
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
free air
Commercial range
Industrial range
0
–40
PARAMETER
LIMITS
Min
4.5
2.0
0.8
–18
–1
20
70
85
Nom
5.0
Max
5.5
UNIT
V
V
V
mA
mA
mA
°C
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
Commercial range
I
IH
I
IL
I
OS
I
CC
High-level
High level input current
Industrial range
Low-level input current
Short-circuit output current
3
Supply current (total)
V
CC
= MAX, V
I
= 2 7V
MAX
2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
CC
= MAX
–60
26
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OL
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= 0.0V, V
I
= 7.0V
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
LIMITS
MIN
2.5
V
2.7
3.4
0.35
0.35
–0.73
0.50
V
0.50
–1.2
100
20
40
–20
–150
35
V
µA
µA
µA
µA
mA
mA
TYP
2
MAX
UNIT
V
O
OH
High-level
High level output voltage
V
O
OL
V
IK
I
I
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
1996 Mar 12
4
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITIONS
T
amb
= +25°C
V
CC
= +5 V
+5.V
C
L
= 50pF,
R
L
= 500Ω
Min
t
PLH
t
PHL
t
PLH
t
PHL
Propagation delay
I
0
- I
8
to
Σ
E
Propagation delay
I
0
- I
8
to
Σ
O
Waveform 1, 2
74F280B
Waveform 1, 2
4.0
4.0
4.0
4.0
Typ
6.5
7.0
6.5
7.0
Max
9.0
10.0
9.0
10.0
T
amb
= 0°C to +70°C
V
CC
= +5.V
±
10%
+5 V
C
L
= 50pF,
R
L
= 500Ω
Min
3.5
3.5
3.5
3.5
Max
10.0
11.1
10.0
11.0
T
amb
= -40°C to +85°C
V
CC
= +5.V
±
10%
+5 V
C
L
= 50pF,
R
L
= 500Ω
Min
3.0
3.5
3.0
3.5
Max
11.0
12.0
11.0
12.0
ns
ns
ns
ns
UNIT
AC WAVEFORMS
For all waveforms, V
M
=1.5V.
V
M
V
M
V
M
V
M
I
0
- I
8
I
0
- I
8
t
PHL
Σ
E,
Σ
O
t
PLH
t
PLH
t
PHL
V
M
V
M
Σ
E,
Σ
O
V
M
V
M
SF00848
SF00850
Waveform 1.
Propagation Delay for Inverting Outputs
Waveform 2.
Propagation Delay for Non-Inverting Outputs
TEST CIRCUIT AND WAVEFORM
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
t
TLH (
t
r
)
90%
POSITIVE
PULSE
V
M
10%
t
w
t
THL (
t
f
)
AMP (V)
90%
V
M
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00006
1996 Mar 12
5
stm32/stm8
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