INTEGRATED CIRCUITS
74LVCH16541A
16-bit buffer/line driver (3-State)
Product specification
IC24 Data Handbook
1998 May 19
Philips
Semiconductors
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5V tolerant I/O (3-State)
74LVCH16541A
FEATURES
•
5 volt tolerant inputs/outputs for interfacing with 5V logic
•
Wide supply voltage range of 1.2 V to 3.6 V
•
Drive capability
±24mA
@ 3.3V
•
Complies with JEDEC standard no. 8-1A
•
CMOS low power consumption
•
MULTIBYTE
TM
flow-through standard pin-out architecture
•
Low inductance multiple power and ground pins for minimum
noise and ground bounce
PIN CONFIGURATION
1OE
1
1Y0
1Y1
GND
1Y2
1Y3
V
CC
1Y4
1Y5
GND
1
2
3
4
5
6
7
8
9
10
48 1OE
2
47 1A0
46 1A1
45 GND
44 1A2
43 1A3
42 V
CC
41 1A4
40 1A5
39 GND
38 1A6
37 1A7
36 2A0
35 2A1
34 GND
33 2A2
32 2A3
31 V
CC
30 2A4
29 2A5
28 GND
27 2A6
26 2A7
25 2OE
2
•
Direct interface with TTL levels
•
All data inputs have bushold
•
Bushold inputs eliminate the need for external pull-up resistors to
hold unused inputs
1Y6 11
1Y7 12
2Y0
13
DESCRIPTION
The 74LVCH16541A is a high-performance, low-power, low-voltage,
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families. Inputs can be driven from either 3.3V or 5V
devices. In 3-State operation, outputs can handle 5V. These
features allow the use of these devices in a mixed 3.3V/5V
environment.
The 74LVCH16541A is a 16-bit inverting buffer/line driver with
3-State outputs. The 3-State outputs are controlled by the output
enable inputs 1OE
n
and 2OE
n
. A HIGH on nOE
n
causes the outputs
to assume a high impedance OFF-state.
To ensure the high impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
2Y1 14
GND 15
2Y2 16
2Y3
V
CC
2Y4
17
18
19
2Y5 20
GND
2Y6
2Y7
21
22
23
2OE
1
24
SW00113
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25°C; t
r
= t
f
≤
2.5ns
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
PARAMETER
Propagation delay
1An to 1Yn;
2An to 2Yn
Input capacitance
Power dissipation capacitance per buffer
V
I
= GND to V
CC1
outputs enabled
output disabled
C
L
= 50pF
V
CC
= 3.3V
CONDITIONS
TYPICAL
2.7
5.0
32
5
UNIT
ns
pF
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
mW):
P
D
= C
PD
×
V
CC2
×
f
i
+
S
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF; f
o
= output frequency in MHz; V
CC
= supply voltage in V;
S
(C
L
×
V
CC2
×
f
o
) = sum of outputs.
ORDERING INFORMATION
PACKAGES
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74LVCH16541A DL
74LVCH16541A DGG
NORTH AMERICA
VCH16541A DL
VCH16541A DGG
DWG NUMBER
SOT370-1
SOT362-1
1998 May 19
2
853-2063 19403
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5V tolerant I/O (3-State)
74LVCH16541A
PIN DESCRIPTION
PIN NUMBER
1, 24
2, 3, 5, 6, 8, 9,
11, 12
4, 10, 15, 21,
28, 34, 39, 45
7, 18, 31, 42
13, 14, 16, 17,
19, 20, 22, 23
25, 48
36, 35, 33, 32,
30, 29, 27, 26
47, 46, 44, 43,
41, 40, 38, 37
SYMBOL
nOE
1
1Y0 to 1Y7
GND
V
CC
2Y0 to 2Y7
nOE
2
2A0 to 2A7
1A0 to 1A7
NAME AND FUNCTION
Output enable input
(active LOW)
Data outputs
Ground (0V)
Positive supply voltage
Data outputs
Output enable input
(active LOW)
Data inputs
Data inputs
LOGIC SYMBOL (IEEE/IEC)
1OE
1
1OE
2
2OE
1
2OE
2
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
2A1
2A2
1
48
24
25
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
2
2
∇
1
∇
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
EN
&
&
1
1Y0
1Y1
1Y2
1Y3
1Y4
1Y5
1Y6
1Y7
2Y0
2Y1
2Y2
2Y3
2Y4
2Y5
2Y6
2Y7
LOGIC SYMBOL
1A0
47
2
1Y0
2A0
36
13
2Y0
2A3
2A4
2A5
2A6
2Y1
2A7
1A1
46
3
1Y1
2A1
35
14
1A2
44
5
1Y2
2A2
33
16
SW00114
2Y2
1A3
43
6
1Y3
2A3
32
17
2Y3
BUSHOLD CIRCUIT
V
CC
1A4
41
8
1Y4
2A4
30
19
2Y4
1A5
40
9
1Y5
2A5
29
20
2Y5
1A6
38
11
1Y6
2A6
27
22
2Y6
Data Input
2Y7
To internal circuit
1A7
37
12
1Y7
2A7
26
23
1OE
1
1OE
2
1
48
2OE
1
2OE
2
24
25
SW00115
FUNCTION TABLE
INPUTS
nOE
1
L
L
X
H
nOE
2
L
L
H
X
nAn
L
H
X
X
OUTPUT
nYn
L
H
Z
Z
SW00044
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
1998 May 19
3
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5V tolerant I/O (3-State)
74LVCH16541A
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
DC supply voltage
(for maximum speed performance)
V
CC
DC supply voltage
(for low-voltage applications)
For data input pins with
bus hold
V
I
DC Input voltage range
For data input pins without
bus hold
DC output voltage range;
output HIGH or LOW state
DC output voltage range; output 3-State
T
amb
t
r
, t
f
Operating ambient temperature range
in free air
Input rise and fall times
V
CC
= 1.2 to 2.7V
V
CC
= 2.7 to 3.6V
0
0
0
–40
0
0
5.5
V
CC
5.5
+85
20
10
°C
ns/V
CONDITIONS
MIN.
MIN
2.7
1.2
0
MAX.
MAX
3.6
V
3.6
V
CC
V
UNIT
V
O
V
ABSOLUTE MAXIMUM VALUES
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V)
SYMBOL
V
CC
I
IK
V
I
I
OK
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
DC output diode current
DC output voltage; output HIGH or LOW
state
DC output voltage; output 3-State
I
O
I
GND
, I
CC
T
stg
P
tot
DC output source or sink current
DC V
CC
or GND current
Storage temperature range
Power dissipation per package
– SSOP (plastic medium-shrink)
– TSSOP (plastic thin-medium-shrink)
For temperature range: –40 to +125°C
above +70°C derate linearly 8mW/K
above +60°C derate linearly 5.5mW/K
V
O
= 0 to V
CC
V
I
< 0
Note 3
V
O
> V
CC
or V
O
< 0
CONDITIONS
MIN
–0.5
–
–0.5
–
–0.5
Note 3
–0.5
–
–
–65
MAX
+6.5
–50
+6.5
"50
V
CC
+ 0.5
6.5
"50
"100
+150
500
500
mA
mA
°C
mW
UNIT
V
mA
V
mA
V
O
V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output clamp current ratings are observed.
1998 May 19
4
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5V tolerant I/O (3-State)
74LVCH16541A
DC CHARACTERISTICS
Over recommended operating conditions
Voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
MIN
V
IH
HIGH level input voltage
V
CC
= 1.2V
V
CC
= 2.7 to 3.6V
LOW level input voltage
V
CC
= 1.2V
V
CC
= 2.7 to 3.6V
V
CC
= 2.7; V
I
= V
IH
or V
IL
; I
O
= –12mA
V
O
OH
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= –100µA
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= –18mA
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= –24mA
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
V
OL
LOW level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100µA
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 24mA
I
I
I
OZ
I
OFF
I
CC
∆I
CC
I
BHL
I
BHH
I
BHLO
I
BHHO
Input leakage current
3-State output OFF-state current
Power off leakage current
Quiescent supply current
Additional quiescent supply current
given per input pin
Bus hold LOW sustaining current
Bus hold HIGH sustaining current
Bus hold LOW overdrive current
Bus hold HIGH overdrive current
V
CC
= 3.6V; V
I
= 5.5V or GND
6
V
CC
= 3.6V; V
I
= V
IH
or V
IL
; V
O
= 5.5V or GND
V
CC
= 0.0V; V
I
or V
O
= 5.5V
V
CC
= 3.6V; V
I
= V
CC
or GND; I
O
= 0
V
CC
= 2.7 to 3.6V; V
I
= V
CC
– 0.6V; I
O
= 0
V
CC
= 3.0V; V
I
= 0.8V
2, 3, 4
V
CC
= 3.0V; V
I
= 2.0V
2, 3, 4
V
CC
= 3.6V
2, 3, 5
V
CC
= 3.6V
2, 3, 5
75
–75
500
–500
"0.1
0.1
0.1
0.1
5
V
CC
-0.5
V
CC
-0.2
V
CC
-0.6
V
CC
-0.8
0.40
0.20
0.55
"5
"5
±10
20
500
µA
µA
µA
µA
µA
µA
µA
µA
µA
V
V
CC
V
V
CC
2.0
GND
V
0.8
TYP
1
MAX
V
UNIT
V
IL
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
2. Valid for data inputs of bus hold parts (LVCH16-A) only.
3. For data inputs only, control inputs do not have a bus hold circuit.
4. The specified sustaining current at the data input holds the input below the specified V
I
level.
5. The specified overdrive current at the data input forces the data input to the opposite logic input state.
6. For bus hold parts, the bus hold circuit is switched off when V
i
exceeds V
CC
allowing 5.5V on the input terminal.
1998 May 19
5
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